We are using DAQ 6533 digital input board in our system.
Actually we use this board for a very simple task, there is 5MHz CLK and
REQ signal and 32bit data. We use the board in Handshake Burst Mode.
REQ signal is High during only if the data is available. CLK signal is
always running.
Part under test comes to test-bed and a sensor detects it. This enables
measurement. If there are defect at current pixel, REQ signal becomes HIGH for the error
pixels. It there are no defects, REQ signal stays at LOW during test. When
the part lefts the test-bed, another sensor detects it.
We get 32 bit data for every defect pixel.
Our problem is:
We are getting only defect pixel data to PC. But we can't know, how many
defect pixel can occur but we can estimate maximum number of defects. For
instance 500000 defect pixels. If we try to read 500000 data, but if there
are defects lower than 500000, PC stops even the part under test leaved
the test-bed.
So, we need to stop burst mode handshake input acquisition/transfer with a
stop trigger even if the number of data transferred is lower than
described number of data.
Is this possible on DAQ6533? (Visual C++)
Data clock is running at 5MHz, we may need to collect 500K to 4M 32bit
data.
We decided, burst mode is the best for this. We faced data loss on other
modes.
We are facing another problem too. The data bus is 32bit. We applied 32bit
parallel data to board. But we read bit 25 and bit 26 always same value.
We connected bit25 to GND and applied HIGH to bit26. We read bit25 and
bit26 is high. If we connect bit26 to GND, both bits become LOW. We
supposed there is a short circuit but we checked the pins at the terminal
block box and checked with oscilloscope but it looks OK. I suppose there
is a problem on software or there is a short circuit at the DAQ board just
after the input buffers.
I hope to get a response until xmas because we would like to finish these
parts before xmas.
Regards and marry xmas.