Hello Community,
I hope that is the right place for my question.
I have a timing problem(delay) between two signals at different PXI6570 cards.
My Hardware Config:
NI-PXIe-1082
Slot4 - NI-PXIe 6674T
Slot 2/3 und 5/5 NI-PXI 6570
My problem discription:
In case I let run the pattern "Timing_Debug.digipat" im "NI Digital Pattern
Editor", is the signal difference is lower than 1.5ns. (Timing_with_Pattern_Editor_TDR.png)
The other case is I use the same pattern in a TestStand sequence and *.vi and get a signal delay of about 10ns. (Timing_with_LabViewCode.png)
The Time-Domain Reflectometry (TDR) option and syncronisation is in both cases activated.
Could anyone tell my what is wrong in the *.vi?
I attatched the Project and Pattern.
Many thanks.
Regards,
Matthias
