Digital Outuput with delay

[Fefys]

Hy,

I have to generate a high level signal in a especific line and them wait a configurable time. For example, I send a high level state to the P0.0 and 2 sec after I send another one and I must change time between the two high state signal (delay) while the vi runs. For example the next high state signal must be 3 sec after the last one.

I use a PCI 6259 and LabView 7.1.

[Diogo_Ap.]

Hy.

   following an example.

  Link:http://digital.ni.com/public.nsf/websearch/6AFDC8FF68F3F1D0862570DD004CFA78?OpenDocument

 Diogo