12-04-2013 11:22 PM
12-05-2013 03:47 PM
Hi cuzb,
From the portion of the code I could see, your code setup looks okay with the possible exception of a loop. Are you continuously reading the voltage? Right now, it looks like you start the measurement, read a single point, then stop the measurement. If you want to read in a loop, the easiest way to do this would be to put a loop around the FPGA I/O node.
In terms of the physical setup, is the voltage you read with the DMM in the correct range? Is the output excitation voltage correct? The datasheet or load cell documentation should tell you what kind of bridge circuit you would need (if any).
I also noticed your fixed-point indicators from the FPGA I/O node have coercion dots on them. I would recommend removing the coercion dots to improve performance. You can either adjust each of the indicators' fixed-point settings to match that of the FPGA I/O node or you can delete the indicators and create new ones by right-clicking and creating an indicator.
Regards,