02-07-2013 10:25 AM
Yeah perhaps thats the reason. If it helps, when I try connecting the READ FIFO to a control, the broken wire explanation that comes up is that the FIFO is 'void' ?? And, now whatever I try, non of the wires get connected.
Am I right when I say I need to 2 FIFO's? One for Read and one for Write that will have to be configured seperately in the project?
02-08-2013 03:31 AM
Any one know how I can read out the data signal from the Host vi attached along with this?
I am trying to read a digital line from the PXI-7813R through the FPGA and control through the Host vi.
02-08-2013 03:31 AM
Any one know how I can read out the data signal from the Host vi attached along with this?
I am trying to read a digital line from the PXI-7813R through the FPGA and control through the Host vi.
02-08-2013 11:01 AM
It looks like all you are missing is to wire up an indicator to the Data output of the DMA on the host.
02-11-2013 02:28 AM
I just wired up an indicator to the data ouput, but nohting shows up in the indicator. While I highlight the execution on the Host, an error signal seems to get highlighted. I have attacehd the Project again.