Interfacing with a JTAG state machine on a FPGA using the USB-6229 device

[Michael_Limerick]

Hello,

I have recently purchased a USB 6229 device and I would like to interface with a JTAG state machine that I have on a FPGA.

This interface is through the standard 5 pin JTAG port (TCK, TRSTn, TMS, TDI and TDO). I would like to be able to toggle the pins accordingly to load Instructions op-codes into the JTAG IR and also to shift data in and out of the JTAG DR.

I would greatly appreciate any suggestions of how to approach this problem.

Many thanks.

[K C]

Hi Michael,

One of the benefits of Jtag is that it is a simple hardware interface. Most of the time you don't need the reset so the only thing left is a mode (TMS), clock (TCK) and data signals (TDI and TDO)

I think you can find the detailed information on internet if not tell me I will dig into my books and papers.

You didn't mentioned if you want to program this in LV or ?

[Michael_Limerick]

Hi KC,

Thanks for your reply.

Yes I would like to write this interface in Labview. I understand how JTAG operates but am unsure of how to control the JTAG port using labview and the USB 6229. As I am fairly new to programming in Labview I was curious if there was a way to perform a procedure or task in Labview and reusing that code again. For example if I had a button on my front panel when pressed would execute the JTAG "INTEST" instruction by firstly loading the instruction into the IR using one side of the JTAG state machine and then shifting data into the DR using the other side of the JTAG state machine. I would then like to have another button on the front panel to execute the "EXTEST" instruction where the procedure is nearly the same as the "INTEST" procedure except the instruction opcode  and the data loaded into the DR is different. I hope I have explained my problem a little bit more clearly.

Many thanks again.

[K C]

Hi Michael,

I don't think you can find anything that you can use directly.

Making a program is not a problem, finding the time that is a problem 

How much time do you have before is has to be ready ?.

How much data you want to handle ? Programming a big FPGA can take a lot of time because in this way you have to program every change of a digital line and your USB device is limited to 1MHz.

[K C]

Hi,

I hope I didn't scare you of 

Where are you located ?

Greetings from The Netherlands

[Michael_Limerick]

Hi KC,

No, you didn't scare me off at all, I've just been trying to get the VI done. Loacated in Limerick, Ireland.
 I've been trying to put together a state machine in labview to control the JTAG state machine on the FPGA, it might be a way forward, it'll just take some time like you mentioned : )

[K C]

Hi Michael,

Great to see you are working on it.

If you get stuck just say so. Maybe I can setup some hardware (probably at home) if you need some help. I have a MSP430 programmer connected to the parallel printer port. I think I can use this to control the JTAG port of the MSP430 with LV.

[Michael_Limerick]

Hi KC,

Thanks for that.

Michael.

[AdnanZ]

Hi Michael,

I hope you are doing well today! I would also recommend that you contact our Alliance Member, JTAG Technologies.

[K C]

Hi Michael,

Are you still working on your Jtag interface in LV ?