PCLK control when using PXI-6534 in the pattern I/O mode

[nader1234]

I'm using ports 0 & 1 of the PXI-6534 in the pattern I/O mode and also using the control outputs in the unstrobed I/O mode for simple outputs.  The users manual says that in the pattern I/O mode the PCLK control is not used but the pattern I/O mode seems to set it low (or maybe sets it as an input).  This a problem for me because I expect PCLK to stay a high output which I set previously.  Does anyone know how to setup the PXI-6534 in the pattern I/O mode so that it does not affect PCLK ... so that it will stay high?

Thanks.

Jim

[Tunde_S · Accepted solution]

Hi Jim,

According to page 2-3 of the PXI-6534 User Manual, if you configure either group to perform pattern I/O, the associated timing control lines for that group are not available as extra data lines. The KnowledgeBase, here, discusses this limitation for the PXI-6534. In summary, port 4 is reserved once you are in handshaking or pattern I/O mode and cannot be used as additional unstrobed data lines.

[nader1234]

OK ... Thanks for your help.

Jim