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Problem with the Continious Pattern Input VI (from the 653x library) running on a PCI DIO 6534 card.

I'm trying to run the Continious Pattern Input VI using LabVIEW 6i and NI-DAQ 6.9 with a PCI DIO 6534 card. This VI is under examples>daq>digital>653x. I have an external Tektronix data generator that supplies a clock and one data line to the REQ1 and DIOA0 inputs, repsectively. The generator outputs 128 clocks with a set data pattern of 12345678, in hex. (My system requires 4 clock pulses per data bit, hence 128 clocks per 4 bytes). When I run the Continious Pattern Input VI, it only 'sees' the first 96 clock pulses, that is the 'number read' on the front panel shows 96. It should read 128. With the VI continuing to run, I then send the card another
128 clocks with the same data, this time it captures 128 as it should, and displays 128 in the number read indicator, but now the data is skewed with the data from the previous. By skew, if I send 128 bits of 12345678 in hex on the first 'transmit', then on the second transmit I send another 12345678, the data I see after the second transmit is 78123456. Somehow the 78 from the first transmit is still there, and in the least significant byte position.

Why does it only display 96 clocks the first time, and skew the data on each sucessive transmit of 128 clocks The first time the 128 clocks are input, the VI should show 128, not only 96 ? I set on the front panel the values for 'buffer size' and 'scans to read' both to 1000, and clock set to 'external'. I'm sending clock and data a a 1Mbps rate, and the problem still exists at slower rates like 100kbps, so it can't be a timing issue. Is there some sub-VI value that I'm not setting correctly ? Any ideas ?
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Here are some ideas that might help isolate the problem. First, it might be possible that the clock signal is coming into the board with noise and that the board is not detecting all the clock edges. You might want to view the signals coming out of your Tektronix generator with a logic analyzer or high speed oscilloscope. Or you could use your clock line as another data line and use the board's internal clock at a faster rate so that you can see both the data and clock lines come into the board.

Is your clock signal coming out of the generator synchronized with the data? The other idea I had was to use a start trigger for the pattern input, as in the Buffered Pattern Input-Trig example. You would use the Digital Trigger Config, Digital Clock Config, and Digital
Buffer Control in place of the DIO Start. However, if your generator is only outputting 128 pulses perfectly synchronized with the data, it doesn't seem like a problem with catching the start of those pulses, based on the data you are seeing in the buffer, unless your generator doesn't immediately output the data at the beginning of the pulses. My first suggestion will help in seeing how the generator is outputting its data with respect to the clock.

Also, there is the possibility whenever you are doing a continuous acquisition that the DIO Read could not read the specified number of datapoints if you have a time limit set. When the DIO Read has been waiting for that time limit, it will just return with the data available, so check that the time limit is appropriate. Also, it is usually a good rule of thumb to have your buffer size 4 times the size of the scans to read when doing a continuous acquisition. You might try having a buffer size of 1024 and a scans to read of 256 or 1
28. Hope this helps!

Regards,

Geneva L.
Applications Engineer
National Instruments
http://www.ni.com/ask
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