Triggered dig. input, 1.st sample delay?

[Gunnar_Kulbotten]

I find the "Start & Stop Trig Input.vi" useful, and want to use it in an application where I sample the state of five photo detectors. When a vehicle passes a detector, I want to time stamp the sample. I collect the samples in an array, and search the array after the acquisition ends. Sample index devided with sample rate is then the time. The problem is that I get a varying time offset from the start trigger (sample 0) to my time stamps. If I wire a bit directly to the trigger pin, I get a time difference from about 10ms to several hundred ms between the trigger and that bit. My DAQ is a DIO-32HS.

Gunnar

[rgharrison]

Hi Gunnar,

Let me make sure I understand you correctly. You are trying to perform pattern input at a specific rate and you want to be able to timestamp your inputs. You notice that when you apply a rising edge signal to both, the trigger and a bit, there is an acquisition difference of 10ms-100ms. What type of trigger are you using? Is it a pattern match? What is your sampling rate?

Are you using the control "pts after stop trigger"? Does your delay correspond to this number of points divided by your frequency? What I would try using is a simple "Buffered Pattern Input-Trig.vi" from the shipping examples with LabVIEW and connect your trigger to one of the bit lines. I've tested it on my PCI-6534 and I see my signal as the first data point in my arra
y. Anyway, let me know what specifics you are dealing with and I might be able to help you out. Have a good day.

Ron
Applications Engineer
National Instruments

[Gunnar_Kulbotten]

Hi!
Trigger is hardware, samplingrate 10kHz. I`m using about 100 points after stop trigger.

I found the problem. It was the DIO_read VI that timed out every 1 second. Therefore the while loop did one iteration for each timeout before the trigger occured, and the loop collected zeros in the output array every time.

Gunnar