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digital waveform with PXI 6562

Hello everybody, i'm new of forum and labview. I have to create a digital waveform with specified frequency and duty cicle...i try to use the Gen Dig Pulse Train.vi example but when i try to execute it there's an error with the physical channel name.

I have some trouble to understand if i can use this example or if it thinked for a specified and different hardware to mine (i remember that i have a pxi 6562). Another question is about the possibility to use the DAQmx driver with my hardware, because i have it in the Labview palette but when i open the DAQ assistant in all menu it say that there is no supported device. 

Moreover i used another example, "Dynamic Generation and Acquisition Demo" but  with it i can't fix the frequency of digital waveform and it vary when i change the generation channel. Please answer me

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Hi DeBli,

 

The NI 6562 is not supported under DAQmx.  It is only supported under the NI-HSDIO driver.  Also, the Gen Dig Pulse Train.vi example is not supported for the NI 6562.

 

The Dynamic Generation and Acquisition Demo generates a counting pattern on the digital output lines.  Each bit in a counting pattern will change at a different frequency, so the behavior you're seeing is expected.

 

Can you provide some more information?  What frequency and duty cycle do you need to creeate?  Do you need to do any other digital tasks while you create this pulse train?  Does the pulse train need to start or stop based on an external signal?

 

Thanks,

 

Keith Shapiro

National Instruments R&D

 

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Thanks for reply, my target is to obtain a different digital signal whit the timing you can see in attachments, so i must have digital signal with different frequency...how can obtain this?
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For this sort of situation, we generally recommend a technique of overclocking - you would run your 6562 at a faster rate and repeat samples to create the pulse width you need.

 

For example, if you need a 20 ns pulse, a 30 ns pulse, and a 50 ns pulse, you could run your system at 100MHz - this makes each cycle 10 ns long.  For your 20 ns pulse, you'd generate a high value for two clocks in a row.  For the 30 ns pulse, you'd generate three clocks of high value, and similarly five clocks of high for the 50 ns pulse.

 

Does that make sense?

 

From the timing diagram you attached, it looks like you're controlling an ADC of some sort.  You can use the scripting functions of the 6562 to loop and repeat to handle many conversions in a row.

 

Please let me know if you have further questions about how to do this.

 

Thanks,

 

Keith Shapiro

National Instruments R&D

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thanks for your tips...if i well understand your suggests the vi to generate the desidered waveform should be something like the attachments, but there's a problem with the x axes where there are samples...they are not coeherent, why? (if necessary modify and post back my vi)

Excuse me if i abuse of your helpfulness but i have another question...there are many samples with the pxi 6562 where the datas are saved in hws format, how can i save them in txt format or another format that can be read by Matlab? thanks for your essential help

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...i forgot the attachment...here it is
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The way you were generating your arrays caused each one to end at an arbitrary time.

 

I've attached a Vi that does something similiar.  I'd strongly recommend taking some LabVIEW training if you've got time, as that would help you understand how to manipulate data within LabVIEW.

 

For more information on HWS, go into the Help menu, select NI-HSDIO VI Reference Help, and under the index search for HWS.

 

Best of luck,

 

Keith Shapiro

National Instruments R&D

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hi, i have a last question about digital waveform generation, the voltage level of different logic states. In the reference help i read the possibility of setting the logic family or a custom voltage level by niHSDIO Configure Voltage, but the NI 656x don't support it, so how can obtain a similar configuration? thanks for reply
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As you say, the NI 656x series of products does not support custom voltage levels.  The 656x product line supports the LVDS voltage standard on its data lines and provides some single-ended LVPECL and LVCMOS event outputs.

 

Perhaps if you explain why you need to adjust the voltage levels for your differential system we can help you find a solution that works with your hardware.

 

Thanks,

 

Keith Shapiro

National Instruments R&D

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hi everybody, I complited my application but I saw differences beetwen pxi output waveform and the relative oscilloscope waveform as you can see in the attachment. If I set more than 70 cycles in the front panel the effective number of cycles generated is always less. I generated the waveform with the simplified attached routine. Do you know if I'm doing something wrong in the generation? If I set number of cycles less than 70 the front panel waveform and the oscilloscope output are the same and correct too.
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