how to trigger on rising edge of req line

[zoran]

I am using pxi-6602 to get 25kHz clock and pxi-6533 board to send data. 6533 will trigger and start sending data whenever REQ line do transition. What I need is to trigger only on rising edge. How I can set this up?

[Spencer S.]

Zoran,

The REQ signal's polarity can be modified with Digital Mode Config.vi in LabVIEW or the DIG_Group_Mode() NI-DAQ function. This is discussed in further detail in the following KnowledgeBase:

How Do I Change the Polarity of the REQ Line in Pattern Generation on the DIO-32HS?

However, the REQ signal is the pattern I/O operation's clock, not start trigger. The ACK signal functions as the start trigger. The same VI and function mentioned previously are also used to modify the ACK signal's polarity.

Good luck with your application.

Spencer S.