Routing m-series timing signals to pfi or rtsi

[Gord]

I'm looking for sample code for routing internal timing signals to PFI or RTSI terminals as output.  Chapters 8 & 9 of the M Series User's Manual talk about doing this but the details just aren't there...

Thanks,

Gord

[Laura F.]

Hello Gord,

Although I cannot find an example program that does this specifically, you can use the DAQmx Export Signal or DAQmx Connect Terminal VIs.  The use of these is explained in this knowledgebase. 

Let us know if you have additional questions about this.  What internal signal are you trying to route?

Regards,

Laura

[Gord]

Laura,

We're doing this under the QNX 4 OS using the DDK, so DAQmx isn't an option.

I would like to route ai/SampleClock and ai/ConvertClock on our PCI-6259 and PCI-6225 cards so that we can externally verify what we think we are doing in software configuration settings.

Gord

[Laura F.]

Hi Gord,

Thanks for the clarification - I missed that this was in the DDK forum  🙂

Thanks,

Laura

[Tom_W_[DE]]

Hi Gord-

In order to route the internal timing signals you first need to specify the direction map for the PFI lines.  To do this you use: 

IO_Bidirection_Pin_Register

Address: 0x172
Type: Writable

This 16-bit register determines the line directions for the 16 PFI lines.  A value of '1' indicates Output and '0' indicates Input.  There is a one-to-one correspondence between the bit order in this register and the PFI lines as enumerated in the device pinouts.

You then need to select the signal to route to your output lines.  A 5-bit representation is used to choose various internal signals.  ai/SampleClock is referred to by 0x2 and ai/ConvertClock is referred to by 0x3.  The 16-bit registers at these offsets contain the configuration fields for 3 PFI lines each:

• 0x1D0 (for PFI2 14:10, PFI1 9:5, PFI0 4:0)
• 0x1D2 (for PFI5 14:10, PFI4 9:5, PFI3 4:0)
• 0x1D4 (for PFI8 14:10, PFI7 9:5, PFI6 4:0)
• 0x1D6 (for PFI11 14:10, PFI10 9:5, PFI9 4:0)
• 0x1D8 (for PFI14 14:10, PFI13 9:5, PFI12 4:0)
• 0x1DA (for PFI15 4:0)

This should get you started.  Let me know if you have any additional questions.

Thanks-

[Gord]

Tom,

Guided by the coding methods in ddk example dioex2.cpp the following approaches have been tried: 

Method 1:

// Set PFI0 to output ai/SampleClock

board->IO_Bidirection_Pin.writePFI0_Pin_Dir (tMSeries::tIO_Bidirection_Pin::kPFI0_Pin_DirOutput);

board->PFI_Output_Select_1.writePFI0_Output_Select (tMSeries::tPFI_Output_Select_1::kPFI0_Output_SelectAI_Start2_PFI);  // 0x02

//Set PFI 1 to output ai/ConvertClock

board->IO_Bidirection_Pin.writePFI1_Pin_Dir (tMSeries::tIO_Bidirection_Pin::kPFI1_Pin_DirOutput);

board->PFI_Output_Select_1.writePFI1_Output_Select (tMSeries::tPFI_Output_Select_1::kPFI1_Output_SelectAI_Convert);  // 0x03

Method 2:

// Set PFI0, PFI1 for output

board->IO_Bidirection_Pin.writeRegister (0x0003);

// set binary 0 00000 00011 00010 pattern

board->PFI_Output_Select_1.writeRegister (0x0062);

Both methods produce the same results.  We see what appears to be the Convert Clock only and it's not on the expected PFI.  The other output looks nothing like the Sample Clock.  Where did we go wrong?

Thanks,

Gord

[Tom_W_[DE]]

Hi Gord-

My mistake; ai/SampleClock should actually be referred to by 0x8 (AI_Start_Pulse).  Otherwise your code looks good.  You should expect to see a very low duty cycle ai/SampleClock and a very high duty cycle ai/ConvertClock.  Which pins do you actually see ai/ConvertClock on?

Thanks-

[Gord]

Tom,

We're still trying to get this sorted out!  Our AI config settings are for 32 RSE channels, 2000Hz Sample Rate, 80000Hz Convert Rate and all code is based on aiex4.cpp.

We seem to have the Convert Clock signal, but the Sample Clock doesn't look right.  When we set Sample via 0x8 or AI_Start_Pulse it looks like we are getting a 20 MHz signal instead. 

The configureTimebase function calls setSlow_Internal_Timebase() and passes in a value of 1.  Presumably this sets the timebase to 20MHz.  If we wanted the 100kHz timebase how would we set it?   What values do we use for routing the selected Timebase signal to a PFI?

Thanks,

Gord

[Tom_W_[DE]]

Hi Gord-

I have attached my modified aiex2.cpp.  In this file I export ai/SampleClock to PFI0 and ai/ConvertClock to PFI1.  When I run the example and probe those lines with my OSC I see a 10kHz clock on PFI0 and repeated bursts of two pulses (for the two channels) at about 72kHz as expected.  Please let me know if you're able to verify the signals with this sample code.

There are no direct routes between the timebase signals and the PFI or RTSI pins.  You will need to route those signals through one of the counters and then to PFI.  It is certainly possible, but it's not documented in the MHDDK and is not trivial.

Hopefully this helps-

[Gord]

Tom,

Thanks for the aiex2.cpp sample code.

In the interest of removing QNX from the equation, I thought I would compile and run aiex2.cpp under WinXP.  The msvc60 build won't work - it's looking for header file visa.h and the file is no where to be found in the ddk's that I have downloaded.  Where do I get this from?

What is the waveform and voltage levels that we should be seeing on the Sample and Convert clock signals? Seeing the signals on a scope is not as straight forward as would be expected.

Thanks,

Gord