DSA Oversample clock

[SudhaBalayanan]

Hi All,

My application requires the usage of DSA oversample clock in FPGA vi.  Before i use the oversample clock, i want to confirm whether it is 256 times the desired sampling rate set in DSA. I tried a simple vi to check the same and varied the sampling rate from 100 Hz to 51.2 Hz.

the oversample clock should vary from 25000 Hz to 13.1 Mhz. But it is always measuring 4.44 Mhz.

has anyone tried this earlier.

Thanks,

Sudha

[Rick_K]

Sounds like you are trying to synchronize a DSA board and an FPGA board. For this application you need to export the oversample clock to the PXI star Trigger Line or a RTSI line. Then read that line in FPGA through an I/O node. at that point.

Please refer to the user manual for PXI-7833R and 4472:

http://digital.ni.com/manuals.nsf/websearch/6F78006EF62932BD86256FFF006DFD0C   (Page 2-15)

http://digital.ni.com/manuals.nsf/websearch/E7968CA4F4FF9D1686256A57004FFC5E (Page 2-11 and Chapter 3)

Rick Kuhlman
Applications Engineer