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Dynamic Generation and Acquisition with Internal Trigger using LV

Good morning!

My experience is limited within the digital programming environment; nevertheless, I have been working on this issue for a couple of days and would appreciate some feedback if possible.

I am simply trying to generate and acquire an 8 MHz 50% duty cycle TTL pulse train on one DIO pin of the PCI-6541, and acquire back the signal on another DIO pin. I have a mating connector to the VHDCI 6541 on-board connector which obviously has the DIO generating and acquisition pins soldered to provide a loopback effect.

In short, I am using the niHSDIO Configure Trigger VI (instance--> Start Trig: SW), niHSDIO Send Software Edge Trigger VI, and Write Named Waveform VI (instance--> Data: 1D U32) in the generation section. For the acquisition section, in short, I am using the niHSDIO Fetch Waveform VI (instance--> Single Record: WDT).

I am seeing results in the acquired waveform showing the generated and acquired digital TTL pulse train on the respective DIO pins, but I can't seem to obtain my frequency requirement of 8 MHz. Also, the lower the DIO pin allocation, the higher the frequency. Unfortunately, due to system requirements, I am bounded to pin DIO 12 for the digital pulse generation. Even with a clock rate of 50 MHz, I'm getting ~6 kHz max frequency acquired. I looked into changing the parameters of the Write Named Waveform VI, but it's not possible since the VI calls a library function node. I also tried generating an 8 MHz waveform via a Digital Pattern Generator VI, but I don't believe you can trigger on generated waveforms? It appears that you have to generate the data by using a simple For Loop as a counter and sending the output to the Write Named Waveform VI. Is there other possible ways I can simply generate and acquire an 8 MHz TTL digital signal (no external connections)?

At any rate, any type of feedback would be greatly appreciated.

Thanks in advance for your time.

dan

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