I want to acquire signal from more than two channels using NI 5734 Flex RIO

[AnveshRaJA]

Dear NI Team,

I used previously, NI5734 getting started example for single channel signal acquisition. When I tried to use the same code by adding another input in the FPGA I could not succeed.  Please, help me to solve this problem. Or let me know any example which is similar to my requirement. I tried peer to peer but it is like I have to use two different cards which does not matches my purpose. I have only one PXIe card, NI 7962R. 

Thanks in advance,

Sincerely,

Anvesh

[Terry_ALE]

How did you try to add the input?  You need to drag the AI 0 down to get more terminals and modify the DMA-FIFO.

Peer to peer is not the way to go here (you only have one card).

[AnveshRaJA]

Hello Terry,

 Thanks for the response. Yes, I know and I dragged down the AIO terminal and I added it to the FPGA file. But, the problem is I am unable to see any signal from the channel 2. I have attached 2 inputs, AI0 n AI1. Only one is giving the signal and the other is not. The error that is appearing is -52000 `The specified number of bytes could not be allocated.´ Please, give me a possible to this problem. 

Thanks again,

Anvesh

[Terry_ALE]

When you run the example 'as is' can you switch from the Host VI to see channel 0 and then channel 1?

[AnveshRaJA]

Hello Terry,

Yes,I can see the two channels. But one channel is showing the graph and the other channel executing an aforementioned error. I edited the FIFO for the two channels according to the requirement.

I dont understand what is happening. I followed the links regarding the error -52000 but the result still same. Please, let me know the solution.

Thanks again,

Anvesh

[Terry_ALE]

To clarify, you ran the example 'as is' and you get an error on channels besides 0?

[AnveshRaJA]

Hello Terry,

Yes, I am getting the same error.  I used two fifos one for channel 1 and other for channel 2 acquisition and coded  same for each channel. Will that be a problem? Because I used two fifos one for each channel and the system cannot understand how to allocate memory for both. If this is the reason, then let me know how to acquire data from two inputs with a single fifo.

Thanks again,

Anvesh

[Terry_ALE]

Could you post your code?

[AnveshRaJA]

Hello Terry,

Yes, I Have posted the code in the question please check it. One is FPGA and other is the host. Please, let me know where I am doing wrong?

Thanks

Anvesh 

[Terry_ALE]

Will look at it but I think I need the project so I can see the FIFOs

[AnveshRaJA]

Terry,

 Thanks for the concern. I added a zip file please, have a look at it. I am using the 2.5MHzFPGA .vi out of all the  FPGAVIs and trial- Host VI out of all Host VIs.

Thanks gain,

Anvesh

[Terry_ALE]

Looked at the code and this needs some work.  Looks like you are running 5734 with one of the high throughput examples (merged).

Could you state the high level requirements?  (e.g. 2 channels at 2.5 MHz, streaming to disk, for a certain amount of time)  Do you need decimation to vary?

[AnveshRaJA]

Terry,

 Yes, 2 channels AI0 and AI1 are the inputs and I want to record and analyse them. I want to stream them for atleast a minute time. For now, I want to see the signal acquisition from the two channels. I may need decimation for lowering the sampling rate. Please, let me know the solution. 

Thanks,

Anvesh

[Terry_ALE]

Just saw that you posted the zip file, will take a look and give tips.

[Terry_ALE]

I made the DMA-FIFO to get 4 elements (it could get 1, 2, 4, or more depending on your target)

I cannot attach a file so here is a screenshot:

[AnveshRaJA]

Dear Terry,

 Thanks for the response. I got success with getting started example but I want to do the same with the project that I have attached. Because, with this example I can record the signal for large amount of time. It would be good if the attached code is changed as per the requirement.

Thanks again,

Anvesh

[Terry_ALE]

Forums are to learn, not get other people to do your work (as your tone seems to indicate).  The suggestion above could enable you to solve your issue.  On the other hand I understand you may not be able to add this to your own code and would like to help.

Almost none of the files in your project open.  Unless I move everything to the C drive, all files are not found.  I did that and then I get this error.  Could you please fix it so I can open the VIs without getting the attached error:

I suggest you make an FPGA folder and Host folder and move files into the respective folders.