Ocramm,
I believe you need to practice more with cRIO and LabVIEW.
These are the Players:
1) cRIO HW--> This has a LV Realtime Controller and an FPGA chip that needs to be programmed with LVFPGA in order to communicate with the I/Os from the cRIO modules.
2) Host PC --> this is where you program the FPGA VI using LVFPGA, and also where you program your host VI (host to the FPGA application). This means that if you want to retrieve Analog data from the cRIO, you need to have a FPGA VI and a Host VI.
The FPGA VI that you create is going to be synthetized and downloaded to the FPGA chip. This is basically burning gates on the FPGA chip to reflect the logic you have implemented in SW.
The Host VI is going to run either on the RT Controller or on the (Windows) Host PC. This is just depending on whether you need your host application to be deterministic.
More over, the FPGA chip can only perform fixed-point calculations. In order to have the Raw data converted into Volts, you need to scale your data in the Host VI.
I suggest you get in touch with the Technical Support at NI Italy and tell us more about your needings, so that we can find out what is the best solution for you.
Regards,
AlessioD
