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Problems with external clocking in 72-79MHz range

I am using a PXI-5404 generator to clock a PXI-5122 digitizer through the PXI star, and get good results 35-72 MHz, and 79-100MHz.  Oddly, however, I get an error from the digitizer (in Initiate Acquisition) if I try to clock from 72-79MHz.  The error (BFFA49D9 or -1074116135 or DAQmx -200550) message reports a hardware clocking error, and suggests I make sure the clock is within its jitter and voltage range.  The error is intermittent around the 1MHz-wide edges of this range, but inside that it never works.  I am using a 5V square wave from the generator, which seems fine outside this strange frequency range.  Could this be an analog problem between these two devices and the PXI backplane?  I can send code if anyone is willing to duplicate this problem.
Thanks
Rob Hingle
858-571-1111
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Are you using a National Instruments PXI chassis?  If so, what model number?

Jeff B.
NI R&D Group Manager
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The chassis is a PXI-1045
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Message 3 of 9
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Hi Rob,

If you run a self-test of the PXI-5122 in MAX, do you receive the same error (-200550)?  There is a possibility that this board could be defective.

Please give us a call at 1-866-ASK-MYNI for further troubleshooting and possible RMA of the board.

Regards,
Andrew W
National Instruments
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Sure enough - same error in self test.  Does this point to a chassis problem or a digitizer problem?
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No, check that...
After resetting the device in MAX, device passes test.  Probably was stuck in external clocking.  So back to square one.
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Hello Rob,

Thank you for bringing this to our attention.  We have been able to reproduce exactly what you are seeing.  This is a signal integrity issue as the clock frequency increases past 60 MHz.  We will look into this and let you know what we find.

What frequency sample clock are you trying to use for your application?

Regards,
Sean Close
High-Speed Digitizers: Product Support Engineer

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We are using the digitizer in a wideband amplifier test station, where the time variables are signal frequency and cycle resolution (samples per cycle - this is a constant throughout a test).  This way the signal analysis is mathmatically identical regardless of signal frequency.  We chose 500 samples per cycle, and because our amplifiers typically do not operate beyond 100kHz, we did not see this effect until experimenting with higher frequencies.  In our range, the large decimation factor (n) kept our sample rate very near 35MHz.  Originally  we kept the sample rate above 40MHz, but found that at the high end of n=2, the sample rate would enter the 70MHz region.  We moved the target frequency to 35MHz, so instead of a n=2 fs=72MHz, the program would request n=1, fs=36MHz.  Therefore the only problem we have now, is when the requested signal frequency and cycle resolution amount to 72-79 MHz.  Because this puts a giant hole in our test range, for all practiacal purposes it caps our sample rate to 70MHz. 

I have received an email from an applications engineer at NI, Jesse Ormston, who said he also recreated the problem, but was able to bypass it by not using the PXI star, and instead routing the signal through coax on the front panels. 
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Rob,
 
The "CLK IN" connector on the 5122 front panel provides a higher quality clocking path than the Star Trigger line.  It can handle rates up to 105MHz on the 5122.  If cabling is not an issue, it should solve your problem.  Thank you for bringing this issue to our attention.
 
-jeff
 
High Speed Digitizers HW Engineer

Jeff B.
NI R&D Group Manager
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