01-11-2008 01:28 PM
01-11-2008 02:06 PM - edited 01-11-2008 02:07 PM
01-11-2008 05:51 PM
01-13-2008
03:06 AM
- last edited on
09-25-2025
03:51 PM
by
Content Cleaner
EBL is right, the PXI-5922 over samples and uses digital decimation which includes a "brick wall" digital filter. The the brick wall filter is the default setting, which is ideal for frequency domain applications where it is optimized for passband flatness and stopband rejection (brick wall). Good news is that you can select from a few other filter settings that are more ideal for time domain applications like yours, and are optimized for parameters such as settling time. If you are using LabVIEW you can use the LabVIEW NI-SCOPE property node with the property Flex FIR Antialias Filter Type or in C you can use the NISCOPE_ATTR_FLEX_FIR_ANTIALIAS_FILTER_TYPE property. I would recommend using the 48 or 16 tap Hanning filter setting for your application.
You can get more information on these settings and their specifications in the NI-SCOPE help file or specifications (https://www.ni.com/docs/en-US/bundle/pci-5922-specs/page/specs.html page 12).
Let us know if this helps and good luck on your project.
Michael S.
National Instruments
01-15-2008 06:36 PM
02-04-2008
05:02 PM
- last edited on
09-25-2025
03:52 PM
by
Content Cleaner
02-05-2008
03:18 PM
- last edited on
09-25-2025
03:53 PM
by
Content Cleaner
Hi Caz,
The 5922 is unique in the way it digitizes the signal. It uses delta-sigma technology to digitize the signal which enables sampling at higher rates without sacrificing resolution. The technology is ideal for dynamic signals due to a very low noise floor and high dynamic range. Still there is some trade-off between sampling rate and resolution. So instead of limiting the resolution to 16 bits by using a 16 bit ADC running at 15Ms/s, this "flex" technology returns data with the maximum resoloution possible (16-24bits) for a given sampling rate (rates vs resolution can be found in the specifications document for this digitizer).
By over sampling and filtering along with additional signal processing techniques the noise is greatly reduced. There is a good whitepaper (http://zone.ni.com/devzone/cda/tut/p/id/3670) which illustrates some of these techniques. Unfortunately the FPGA is not exposed to the user beyond the ability to set the acquisition settings and to choose your antialias filter so I do not think it will help to provide you with a hardware-based solution for summing your signal and the R-Series devices which have a user-programmable FPGA will be too slow to meet your bandwidth requirements.
02-05-2008 03:38 PM - edited 02-05-2008 03:38 PM
02-05-2008 03:45 PM
Thanks Jennifer for your response. You really cleared up my understanding of the 5922. I must ask, however, what do you see winning, more user functionality with FPGAs like in the R series boards or more software processing at higher bandwidths due to faster busses, ie PXI express?
Thanks,
caz
02-05-2008 05:21 PM