ADC Port A clk

[EricTheRed]

My name is Eric Beutlich and I am trying to set up an ni5640RIF board.

I was going through the Getting Started with the LabVIEW FPGA Module, trying to setup a Spectrum Analyzer. My program compiled, but when it tried to run, it had an error specified in the picture below. I am using the ADC_0_Port_A_Clk as suggested, but is this clock an internal clock? I believe it is a problem with the ADC_0_Port_A_Clk but what do I modify to debug this error?

Thanks a bunch,

Eric

[Mauricio Capistran-Garza]

Hi Eric,

I can't be sure without looking also at the project, but my guess would be that you compiled the VI by clicking on the "Run" arrow. So what is happening is that after it's done compiling the VI, it's downloading it to the board and trying to run it. Since you haven't configured and enabled the reference clock to the ADC, then the ADC_0_Port_A_Clk is non existent. Since the VI is trying to send some data to the host, it needs the clock to be running, otherwise you get the error that you're getting.

So, what you should really be doing is compiling the VI by right-clicking the VI in the project explorer and clicking on "Compile". If you hit the run arrow because you had disconnected from a previously started compilation, then you can just ignore the error. Then to run the VI you must create a host VI that confiugres the clocks before trying t access any controls/indicators/FIFOs.

Hope this helps

- Mauricio