Effeciency of HDL Interface Node compared to IP Net

[Rashid931]

Hi,

    If I use HDL Interface Node for VHDL code in FPGA VI, Will it be more efficient than IPs which are available at http://www.ni.com/ipnet/ ?

Kindly guide me.

Thanks and Regards,

Rashid

[David_L · Accepted solution]

Hello Rashid,

IP on IPNet will be written using CLIP which is much better for implementing VHDL into your LabVIEW FPGA code.  The following document discusses some of the differences between the two.  

http://digital.ni.com/public.nsf/allkb/ce502221933fcceb8625750000011fb5?OpenDocument

Also, something to keep in mind, as of LabVIEW 2010 the HDL node will be deprecated so for future compatibility, you are better going the CLIP route.