External Reference Clock on pci-5640R

[luchigno]

Hi. I want to clock my IF-RIO 5640R board, with an external reference clock at 2MHz frequency and i would to generate a 200 MHz clock inside the board (as the vcxo).

If I set properly the parameters inside the "configuration timebase" vi, using the pll on the cdc7005, can i achieve this feature?
How can i do?

Thanks....

[philippe_w]

Yes, you can synchronize the PLL for the internal 200 MHz VCXO to an external reference clock on CLK IN.

For an FPGA Project, use the 'Configure Timebase.vi' and set the following:

VCXO => VCXO Control to PLL
Reference => SMB Ext Ref Enable to True

The other settings in those two clusters should remain at their defaults.


When using the Fixed Personality / Driver mode, this is equivalent to using the 'ni5640R Configure Ref Clock.vi' and setting the 'clock source' to Clk In.

[Mauricio Capistran-Garza]

Hi,

Just to add to what Philippe already said, if you're using the driver, I believe you can only drive the PLL with a 10 MHz reference clock.. although I'm not positive about that.

- Mauricio

[EBL]

If you use the fixed-personality driver, and you are feeling a little bit brave, you should be able to use ni5640R Configure Timebase.vi. It can be found (at least on my computer) at:

C:\Program Files\National Instruments\LabVIEW 8.2\instr.lib\ni5640R\Driver\NI-5640R VIs

Leave the defaults as they are, except change as follows:

Ref Divider (M) = 2    (for 2 MHz)

SMB Ext Ref Enable = True

VCXO Control = PLL

CP Enable = True

That should be everything, to the best of my memory. You may have to enable the Invert CP bit.

Hope this helps,
Ed