03-18-2008 04:08 AM
03-24-2008 04:08 AM
04-08-2008 06:36 AM
Hi, sorry for so late answer,
Actualy I'm working with 5640R and I need to use HDLNode for FPGA realization FSK demodulator.VI. Do you have any tutorials for using this block? And is it possible to realize any schematics (*.VI) using HDLNode in FPGA??
Best regards,
Nikita
04-08-2008 02:06 PM
Hi Nikita,
Have you seen this tutorial? It gives a step-by-step on implementing an FIR filter using the HDL interface node. While this is a basic example, it should give you the fundamental tools needed to take the next step in your application. Since this tutorial is geared towards the FPGA on our cRIO and R series products, you will need to adjust some parameters to make it work on the 5640R. Reference this forum for how to make these changes.
I would also highly recommend studying the help files we have for the HDL interface node which will give you more detail on how the node is used and what is available with it. This help file should be included with LV FPGA, and can also be found online here.
Finally, we have some IP examples for RF applications available at www.ni.com/ipnet. You can find examples sorted by application type.
Regards,
05-07-2008 02:55 AM