SCTL using same clock

[1k2k]

I am using 2 SCTL with the same clock, are they running in parallel or sequential?

Details:

I am using the 1st SCTL to acquire ADC data.  It is triggered by a button.  During the acquisition, when the 1st SCTL detects an event, it sends a FIFO message to start another SCTL, which should run at the same speed.  So I programmed another SCTL using the same ADC clock as the timer.

But I found the behavior looks strange.  I don't know if these 2nd SCTL is running after the 1st is stopped.

[JerryAL]

Hi

Parallel loops run in parallel.  Since these are both SCTL I can guarantee that there are no shared resources and each loop should behave completely independent of the other.  What exactly is the "strange" behavior? 

Just guessing, there are multiple cycles of latency between FIFOs.  Meaning if I write to a FIFO on the first iteration that data may not be available to read from the FIFO until up to 6 clock cycles in this case.  You need to monitor the empty and full flags to validate his data.

Can send some screenshots of your code and explain the strange behavior in a little more detail?

Thanks

Jerry