Phase changes

[JerryAL]

Hi Sreenivasulu

I’m sorry, but I don’t have a specific example for you, and unfortunately, other commitments keep me from making one from scratch.  I don’t have a continuous generation example at this time.  That is why I posted the acquisition program even though Siddu had asked for generation as well.

In terms of your image, I think the error you see there are the same errors from your previous projects.  Either the project is not done correctly, or the project is missing a DMA FIFO named “Host to FPGA”.  That part is not in your image, but I assume that you got this from the Input and Output example.

The second issue I see is the broken HW Exec Ref Out cluster wire that goes into the Config Timebase VI.  I think this is directly related to the Typedef control not being bonded to the VIs correctly.  Please see my previous post concerning the “Bind to Typedef” option.

I don’t think this is what you have been asking for, but here is another example I have that generates PSK signals.  You can download it from here:
https://download.ni.com/#support/rf_segment/demos/ifrio/Transceiver/

It is based upon the Modulation Toolkit VI MT PSK Transceiver(with FFT Spectrum).vi.  I suggest that you look at what this VI is doing before you go to the IF-RIO version.

Jerry

[sree_405]

Hi Jerry,

I am Sreenivasulu.now i cleared my problem some extent.for my application i am using ni 5640R IQ output example project.
i am able to get analog modulated(AM,FM i tried) signal.but i am unable to get digital modulated signls.for signal generation i am using LabVIEWMathscript node.

here i amattaching one image as well as my project please correct it me.


Thanking you so much


Regards
Sreenivasulu.O

[sree_405]

Hi Jerry,

I am Sreenivasulu.now all most all  i cleared my problem .for my application i am using ni 5640R IQ output example project.
in that i cofigured DAC in quadature mode.in that what is that transmitt frquency.if i kept that one some value i am unable to get correct output.
if i kept that vaslue "zero" i am able to get correct output.please give me some idea abt this issue.

And one more issue what abt CIC interpolation factor of DAC.how much i have to kept.i think this is depending upon my IQ rate.tell me relation between them.

Here some time si am unable to get continouse output.suggest one comment on this also.
Here i am attching one project check and correct above Qs.
In this project i am using fc=21.4M Hz,fb=19200Hz and i am using one encoding technic(btgen.m- for this i am taking input is text).

Thanking you so much sir.

Regards
Sreenivasulu.O

[sree_405]

Hi Jerry,
i am sreenivasulu.
The range of the output from the ni 5640r card  is 0.8 V pk-pk.
it is fixed.if i want increase what ia have to do and if i want to decrease what i ahve to do.
please reply me sir

Thanking you sir.

[Speedy_Badger]

Hello Sreenivasulu,

The 0.8 V pk-pk (2 dBm peak) full range of the 5640R is fixed. You can modify the gain (scaling) of your digital data in relation to this full range in your application. From the looks of your application you have modified the PSK example provided by Jerry. This Already has the scaling built in via the "Output Scale Factor [0, 1.99]" control on your Host front panel.

Regards,

[sree_405]

Hi Jerry and Chris B,

Thanks for your replies.Here i have one issue on generating own bit stream.
i have some text("icsltd").i need to encode this text.for that i am using one encoding tech(CCITT1-Common).
this encoding technic i developed in Mathscript node.this output bit stream i tried to connect FSK modulation block.
but i didn't get output.
Here i am attaching that one.please go through and correct me.


Thanking you sir

Regards
Sreenivasulu.O

[sree_405]

Hi Jerry and Chris B,

Thanks for your replies.Here i have one issue on generating own bit stream.
i have some text("icsltd").i need to encode this text.for that i am using one encoding tech(CCITT1-Common).
this encoding technic i developed in Mathscript node.this output bit stream i tried to connect FSK modulation block.
but i didn't get output.
Here i am attaching that one.please go through and correct me.

if i use mathscript for generating modulated signal above problem is solved.
but if i use mathscript for generating modulated signal i have to take Fc=21.4M Hz and Fs=50Mhz.if i take Fs=50Mhz
it is taking too much time to run.


Thanking you sir

Regards
Sreenivasulu.O

[sree_405]

Hi Jerry and Chris B,
I am Sreenivasulu.Here i have one critical issue on IQ clock rate.
I have to generate modulated signal with Fc=21.4MHz and BW is +/- 50kHz.
for this i am seeting CIC interpolation factor is 1 and i used default DAC clock(200MHz).
so IQ clk is 50MHz(IQ Clk = ( 200 MHz / 4 * CIC interpolation ) ).
 i was unable to get correct signal,but signal is coming at 3.6MHz.i have to get signal at 21.4MHz.
Tell me where the problem.Please correct me.
Tell me one more thing is there possibility to generate signal with 21.4Mhz using ni 5640r card.


Thanking you sir
Sreenivasulu.O

[sree_405]

Hi

I am Sreenivasulu.

i am getting phase changes when i am using sampling frequency is high(above 4MHz,my application is 50Mhz and 25 MHz)

if i am using less sampling frequency i am not getting any phase changes.

please help me to come out from this problem.still i am not getting why it happens like this.

Thanks

Sreenivasulu.O