Using multiple PCI 5640R for MIMO

[cdschmit]

Hi,

I am considering using multiple PCI 5640R cards in the same case for a MIMO application.  My motivation for using the 5640R for this application was that I could start out by using the 5640R for data aquisition only (ignore the FPGA) and test algorithms in LabVIEW (non-real-time), then eventually migrate the code back to the FPGA for real-time.  I just have a few questions in advance:

1) Can multiple 5640R cards be easily synch'd?  I assume a common clock could be fed into the CLK IN port on each card.  Can that clock source come from one of the cards, or do I need a dedicated oscillator on the bench?

2) Am I right in assuming that the bandwidth bottleneck (when streaming sampled data) will be the PCI bus which must be shared between the cards?  Will the reduction be linear in the number of cards, or much worse due to overhead for continuous real-time acquisition?

3) Is there any forseeable problems in using the 5640R?  I'm surprised that I have not found more info on others using it for MIMO or synchronizing multiple cards.  I know there are other hardware options, but any that give me decent bandwidth (say 2-5 MHz per each of 6 channels) and the advantage of slowly migrating to the FPGA?

Chris

[cdschmit]

Hi,

No answer yet means either I asked too many questions at once, no one knows, or I am a complete nut!  Or maybe all three.  Let's try ONE question:

Has anyone clocked more than one PCI 5640R for simultaneous sampling of the ADCs? 

I may be able to borrow one from another research group to try it myself, but I'm looking for some advice on how to get it done.

Thanks!

Chris

[philippe_w]

Hi Chris,

I've taken a look at your questions, and I think it will be challenging to use multiple PCI-5640R's together into a tightly-synchronized MIMO system. We have not developed such a system using this card.

There is a document T-Clock Technology for Timing and Synchronization of Modular Instruments that provides a lot more detail on issues involved with synchronizing devices that you may need to overcome depending on the accuracy you desire.

You will need to write some custom FPGA code and provide a high quality external sample clock on CLK IN. You will have to configure the timebase to use the external clock, and then trigger the cards using an external hardware trigger.

You may want to use a device such as the PXI-5651 to provide the sample clock (for example, a 200 MHz sine). You should be able to provide a clock from 30 MHz to 200 MHz on CLK IN.

Perhaps the most complex part will be the need to synchronize the ADC's across all boards (see http://forums.ni.com/ni/board/message?board.id=ifrio&thread.id=287 ). You will probably want to do this with an initial trigger from the external hardware trigger so that the ADC's will be synchronized as closely as possible. I think it would be easiest to (at least until you get it working) configure all of the ADC's identically (decimation, etc.).

~Philippe

[cdschmit]

Hi Philippe,

Thanks for your response.  Based on everything I've seen, it looks feasible, but I don't want to be the front runner on making it happen.  I'll avoid the use of the IF-RIO by going to a 8-channel (simultaneously sampled) digitizer for now.  There may still be time in the future of this project where this information might still be of use.  If anyone beats me to it, pleast LET ME KNOW!

Chris