09-22-2010 04:14 PM
I am compiling my design for the NI PXIe5641R and saw the following message:
Phase 6: 22211 unrouted; (7335208) REAL time: 4 mins 13 secs
the router will be able to meet your timing requirements. To prevent excessive run time the router will change
strategy. The router will now work to completely route this design but not to improve timing. This behavior will
allow you to use the Static Timing Report and FPGA Editor to isolate the paths with timing problems. The cause of
this behavior is either overly difficult constraints, or issues with the implementation or synthesis of logic in the
critical timing path. If you would prefer the router continue trying to meet timing and you are willing to accept a
long run time set the option "-xe c" to override the present behavior.
My question is where do I go to set the "-xe c" option for the compiler?
Thanks,
-Chuck
09-22-2010 04:34 PM - edited 09-22-2010 04:35 PM
Hi Chuck,
You can access the Xilinx options by right clicking on your FPGA target and selecting properties. I would suggest using the timing performance design strategy.