08-20-2015 12:12 PM
Hello Everyone
Newcomer to Profibus work and I have been having issues that I'm hoping someone will recognise and give me some pointers.
In terms of the overall architecture we have a cRIO-9082 hosting the control system (CS) for a complex plant forming and experimental test rig. The overall CS will control a number of sub-systems and one of which is a main motor. The CS is will be connected to the main motor via PROFIBUS. The cRIO has the COMSOFT cRIO DP module in slot and it is destined to operate as the Master. The main motor is controlled by a Siemens PLC that looks after lower level systems such as inverters. The CS cRIO connects to the Siemens SIMATIC NET S7-1200 - PROFIBUS CM 1242-5 Communications Module configured as the slave and means that to the top level CS the whole main motor sub-system is largely a black box.
In integrating and testing the system, these are the steps we have carried out so far:
Issues:
So I guess my questions to the Profibus gurus out there are:
Bit of a long one, thank you to anyone who takes the time to read this and hope someone comes back with the silver bullet.
08-24-2015 05:44 AM
Hello JonP2,
I apologise for the delayed response, I have been looking into the issues that you are experiencing, but I am not coming up with much information that would be helpful for you. To help me in looking into this further, I would appreciate if you could direct me to the example that you have been working from, so I can understand more clearly what it is that is going wrong.
Thank you for all the information you have given me so far, I hope I will be able to assist you with this, but if you have access to support, I suggest that you call or email your local office as your issue seems quite complex and you will probably get a faster repsonse that way.
Cody
08-24-2015 07:38 AM
Cody
Thanks for responding - will be pursuring with the local UK office as well but decided there may be a wider audience with ideas on this forum.
The example I refer to is called cRIO PB-Master (LV2014).lvproj
After download from http://www.ni.com/download/ni-profibus-for-crio-2.0/5242/en/ it installs to here on my machine
C:\Program Files (x86)\National Instruments\LabVIEW 2014\vi.lib\addons\Comsoft.lib\cRIO PBMS\Examples
My original post referred to the 2014 version, I notice that when downloading earlier today, having just updated to LV 2015, it has now been installed on my machine as (LV 2015). A quick look through the code and it appears the same but I haven't run it yet in the same way I mentioned in earlier post so as far as I am aware the issues remain.
Thanks again.
JP
08-25-2015 10:07 AM
Hi,
Thanks for giving me that information, I will continue to look into this, but I am also in the UK office so if you know who it is that is dealing with your request I think it would be more beneficial for us to work together on it.
I will still update you if I have any ideas on your problem.
Cody
10-15-2015 09:39 AM
So this issue continues to prove problematic.
We have managed to:
a. Get comms between Configurator and the Slave
b. Get comms using the shipped PB example through DPV0 (cyclic) comms.
Due to point b. we have now adopted DPV0 and will press on with that.
However, when we integrate the example code into our own application we have problems. The shipped code no longer works in that the Diag info coming back gives us bogus info such as Master Address:0 and Serial Number 0x0000. The Diag data coming back using the shipped and standalone example returns genuine information for the same condition.
We believe that there is an FPGA issue. The reason is that when we compile the shipped FPGA code within our own project and execute it from the host, things behave as we would expect.
When we add parallel loops to the FPGA code for Digital IO modules and recompile, we get the problem above - that is, Master Addr: 0 and Serial No:0x0000 and the PB configuration does not return input and output sizes.
Is there something we are missing here wrt to the PB module? 1. Specifically, we must be able to add parallel (non-dependent) loops to the FPGA code musn't we?, and 2. Is there any bets practive regarding using the PB vi's from the shipped example library in one's own project and in particular the type def FPGA reference that comes with the vi's as a dependency?
Grateful for any suggestions as ever.
JP
11-17-2015 03:11 PM
JP
Can you post the modified code(whole project) that is causing you problems? It is little difficult to judge what might be happening with your modified code without seeing it.
Thanks