Delay generation

[tigsbryant]

Hi,

I want to develop my application in such a way that once I start generating an analog pulse train it should not be turned off for 5 minutes and similarly when it is turned off once it shouldnot be turned on for 5 minutes. How can I do that? I am generating an analog pulse train of 7 Volt amplitude by PCI 6289 because that is what the requirement is  by the instrument on the other side.

Can somebody suggest me what do i need to use for on off timing problem that i stated?

Thanks,

Tigs

[Grugh_Mike]

Dear Tigs

Why dont you use a sequence and put it in while loop to run it continously.

The PCI should send out the signal for 5 mins, then stop the device for 5 mins.

This task can be achieved easily using a sequence with a time delay to move onto the next sequence.

Regards

Grugh

[Dennis_Knutson]

A sequence structure would be a bad choice in any situation and a fixed delay would also be a poor choice. I would suggest a state machine and a timing function you could actually abort early if you wanted. The Elapsed Time function would be something to start with.

[Grugh_Mike]

Dear Dennies

Could you please explain why a sequence structure and a fixed delay wont serve the purpose.

Sorry for asking this, just wanted to get in depth.

Regards

Grugh

[Dennis_Knutson]

You can't exit a sequence structure early and you can't interupt a delay function.Clicking on a stop button and waiting up to 10 minutes would pose a problem.

[Grugh_Mike]

thanks Dennis

[tigsbryant]

Hi all,

Actually there is some other code besides this delay logic. I tried using a timed loop for delay of 5 sec.

Now the thing happening is, that when actually the delay is elapsed, it also delays the parallel execution of the code which I dont want it to happen.

Can u suggest me what to do for this?

Thanks,

Tigs

[Grugh_Mike]

Dear Tugs

Could you please attach the code?

Regards

Grugh M

[tigsbryant]

I cant actually attach the whole code as I am working for a research center.

I have used a Timed while loop where I want to generate a delay. This loop resides inside a case structure in True case. False structure is blank.

There is some code besides this placed into VI

Now when it executes the true case, everything waits for the time delay to be elapsed.

Thanks,

Tigs