Instrument Control (GPIB, Serial, VISA, IVI)
Error line goes nowhere
Solved!
Hello
I recently inherited some old code, which i was tasked to update.
In this code there is an element that confuses me (image below).
Basically an action is chosen with a case structure, connection established with VISA (first error bracket) and then data is read/written via VISA (second error bracket). What confuses me here is an error line that starts empty before a timed loop that runs through all case structures, but nothing is ever done to it, as error handling is done on a separate error line. This line is then shifted before a new timed loop begins. When timed loop runs out, data from register is written to a state machine.
So basically, what is the purpose of this?
Please excuse me for simplified image, i am not allowed to share any code.
I assume that this is a redraw of the actual code and it is incomplete.
The shift register that goes nowhere is indeed not going anywhere but in case of an error it stays in the shift register eliminating all IO.
(except when the IO is not connected to an error in from the shift register)
So the error should be handled inside this statemachine !
Yes, it's a redraw, here is a better version if it helps.
The state machine should indeed handle the errors, but what confuses me is that there doesn't seem to be any errors possible.
The line starts with empty error cluster and nothing is ever written to it, it just passes through other case structures for some reason.
Only error i could think of would maybe be loop time-out error if that's a thing?
Does incomplete line constitute an error if loop times out?
Could this be sort of legacy-legacy code? At some point there was something done with it, but when it was updated the line was just connected like this? And now that i'm fixing it i have no idea what it does.
An error can happen in the VISA open or the VISA read and the case where that should be handled is not visible.
Menaning the inside Error case after the read or the open.
