TNT4882 embedded application DMA problem

[Firmware_programmer]

Urgent problem!: I work with TNT4882 in embedded application.The GPIB works fine with "regular command" but there is a problem when

 I must receive binary data bia DMA. My CPU is a 386EX from INTEL and I work with its DMA0 channel.

The TNT4882 give the request for the transfer.Sometimes the transfer stop before the end of the transfer count.I capture with GPIB analyser but I don't see

anything special  in the handshake lines.If I read GPIB counter I see that is no 0 and the value if exact with the number that return  the function(I read it  via NISpy)

                                           please Help what is the problem?

[Collin M]

Hi,

I'll need some more info so I'll list my questions here:

1. Are you using the DRQ and DACK signals on the TNT4882 to do DMA accesses?

2. Can you clarify that at least part of the data is successfully transferred across GPIB?

3. When the transfer stops, what is the state of the GPIB NRFD, NDAC, and DAV signals (as determined with the GPIB analyzer)?

4. Have you verified that all of the data accepted by the TNT over GPIB has been transferred to memory? (does the TNT FIFO empty after the transfer stops?) If not, was any of the data in the TNT FIFO transferred into memory?

5. What are you programming the TNT transfer count to, and what is the actual size of the transfer?

6. What termination method are you using (EOI, EOS).

[Firmware_programmer]

1. DRQ DACK:

•  This pins are connecting to DRQ and DACK of the CPU. The DMA is hardware demand transter (the TNT is the  initaiate of the transfer)

    2.  The first time that I try transfer all the data is transferred OK  into the memory. The problem is only afer the first time. The quantity of data that is transfer is the number that return the ViWrite() (read via NiSpy) -1(I check in the memory that is reset to 0 before transfer)

    3.  the 6 last lines in capture are:(|+ =  up arrow |- = down arrow) (order DATA  Control line    HANDSHAKE line)

               9e      00010011           DAB      DAV|+    (in blue)

• 9e      00010111                        NRFD|+
• 9e      00010101                        NDAC|-
• 61      00010100                        DAV|-
• 61      00010110                        NDAC|+
• 61      00010010                        NRFD|-

    4. 9e is tha last byte  that is write in memory.61 ise the 413 butes in buffers ( the number of bytes that success to transfer is variable no stop always to the same place in buffer) the TNT488e counts it but it no write onto the memory. The STS2 register is 9A this means that fifo B is empty(I work with 8 bits DMA).Count is ff0019d (begin in ff00000 value) (the DMA channel  stop the transfer when it receive the exact number of bytes that need I put in TNT counter nymber that is OK for each DMA transfer that I will need).and the is exactly 413 bytes transfer (success 412)

5. I receive binry data and then the terminaison is with counting no with another terminator. (for normal receive my firmware may stop with 0x0a value or EOI kine assreted or with the two method. I send oxa in the end of my query response).

                                                                                                    I hope that these information will be help you to help me

[Collin M]

I don't see anything in your response that would cause the transfer to stop.

When the transfer does stop in the failing case, read the following registers an record their values: ISR0, ISR1, ISR2, ISR3, SASR, and STS1. Also, what interrupts are you enabling in the IMRs?

Are you notified of any error condition at the TNT4882 or the GPIB device during the failing case? How do you know the transfer has stopped in the failing case?

Also, do you do all of the configuration for the TNT4882 prior to each DMA transfer?

Is it possible for you to post your firmware code to this thread? Alternatively, I could give you an email address so you could email it to me.

[Firmware_programmer]

Hi

1.                      In DMA I don;t work with interrupts,then I write before beginning the DMA transfer 0 in IMR1,IMR2,IMR3 and 0x80 IMR0
2.                      The value of register when the DMA stops:

• ISR0                  0x05
• ISR1                  0x10
• ISR2

[Firmware_programmer]

Hi

1.                      In DMA I don;t work with interrupts,then I write before beginning the DMA transfer 0 in IMR1,IMR2,IMR3 and 0x80 IMR0
2.                      The value of register when the DMA stops:

• ISR0                  0x05
• ISR1                  0x10
• ISR2           

[Firmware_programmer]

Hi

1.                      In DMA I don;t work with interrupts,then I write before beginning the DMA transfer 0 in IMR1,IMR2,IMR3 and 0x80 IMR0
2.                      The value of register when the DMA stops:

• ISR0                  0x05
• ISR1                  0x10
• ISR2            

[Firmware_programmer]

Hi

1.                      In DMA I don;t work with interrupts,then I write before beginning the DMA transfer 0 in IMR1,IMR2,IMR3 and 0x80 IMR0
2.                      The value of register when the DMA stops:

• ISR0                  0x05
• ISR1                  0x10
• ISR2             

[Firmware_programmer]

Hi

1.                      In DMA I don;t work with interrupts,then I write before beginning the DMA transfer 0 in IMR1,IMR2,IMR3 and 0x80 IMR0
2.                      The value of register when the DMA stops:

• ISR0                  0x05
• ISR1                  0x10
• ISR2                 

[Firmware_programmer]

Hi

1.                      In DMA I don;t work with interrupts,then I write before beginning the DMA transfer 0 in IMR1,IMR2,IMR3 and 0x80 IMR0. The DMA transfer when the DMA channel reach than it receivve the exact count of bytes.
2.                      The value of register when the DMA stops:

• ISR0                  0x05
• ISR1                  0x10
• ISR2                  0x11
• ISR3                  0x08
• STS1                 0x20
• STS2                 0x9A
• SASR                0x04
• CNT0                 0xA5   (begin value 0)  (these value is run time dependant the DMA don't stop always in the same place)
• CNT1                0x01    (begin value  0)
• CNT2                0x00    (begin value 0)
• CNT3                0xff      (begin value 0xff)

I ininialize the GPIB counter with the maximum value than I may receive  the enf of DMA go from the DMA channel. In the end of the transfer I stop the GPIB with STOP command. The application send the binary values hash in ~10e3 group we try to little them but this not solve the problem  .

I know the transfer stop in error because application don't success to transfer the binary data block,I assume the problem result to a problem with the GPIB device because it is the initiator for each transfer. I don't understand why the transfer stops on transfer time.And I try to understand the register values but I don't success to analyse them right. in the attachment I put the GPIB init that I do when open GPIB remote session ( the instrument has other remote platform  (USB LAN) and the GUI permits to user  to change plafform via keyboard operation. Before begining DMA transfer I run SetGPIBDMA routine. When I finish to receive binary data and treat it I run SetGPIBNormal routine. I use RQS line to "say the application" that I ready to receive the binary block or that I finish to receive and treat it. The binary data that produces the problem is 8 bits transfers.

Message Edited by Firmware programmer on 08-22-2005 12:44 AM