Local variables/duplicate terminals on FPGA workaround

[zelenbabas]

Hi,

I just switched from LabView to LV Comms and am trying to transfer an FPGA code that used local variables. Apparently these are not supported in LV Comms and the alternative is to simply duplicate the terminal and wire it somewhere else. However, even the duplicate terminals are not supported on FPGAs and I get the following error:

"Multiple terminals wired to the same control or indicator are not supported on the FPGA target."

Is there an alternative to this? The two terminals are in separate SCTLs.

Thanks!

[adamarnesen]

This is a great question. There isn't a super elegant work around in LabVIEW Comms 2.0 (but we are aware of this need for a future release). The best way to mimic this behavior will be to create local registers to communicate between your to SCTLs (now called Clock Driven Loops or CDLs). The LabVIEW FPGA Register primitive will appropriately keep your data coherent between clock domains.

This is how it may look to use registers. (code is in attached project)