Possible bug: Create 5791.gvi

[beck.278]

I have noticed an error which may be the result of a bug in [Create 5791.gvi ] located in ...\LabVIEW Comms 1.0\Resources/vi.lib\FPGA.  The gvi itself allows you to open and examine the diagram, which we noticed refers to a NAMED clock constant: Transceiver\Sample Clock x2.  We didn't notice a problem until we RENAMED our 5791 RF front end in the System Designer - I called it "Transmitter (NI 5791)" since we are using it only to transmit. This seems to be causing a compile error in the Create 5791.gvi, since it says the named resource does not exist!  We can't make changes to Create 5791.gvi as it is write protected in vi.lib.

Our workaround is to go with the "default" name of our 5791 module - "Transceiver (NI 5791)". I'm also guessing that attempting to rename the clocks themselves (Sample Clock and Sample Clock x2) would also cause this error.  Therefore I do believe this clock constant reference in Create 5791.gvi is a bug!

Hope this helps,

Brian

[Ryan_K.]

Hi Brian,

Thanks for bringing this issue to our attention; I've been able to reproduce the same behavior on my system. I'll notify R&D of the issue and let you know what they say.

Regards,

[GerardoG]

Hello Brian,

Looks like we could have made that clock an input to the Create VI to avoid this issue. 

It seems simpler to me for you to use the Save a Copy as and use your custom copy of the Create 5791.gvi for your project so you don't have to keep the default name for the RF front end.

Gerardo