How do I write to front panel controls on FPGA Labview code?

[VK3DRB]

I have a program on the FGPA running and the bit file has been deployed to the target.

When the FGPA is run WITH the FPGA VI front panel, I can read and write analogue and digital signals through the I/O connector, I can read results into another VI, and I can write numerical values to the FGPA, all successfully. This is the way I have been running the FPGA program for the last several months, without a hitch.

However when the FPGA is run WITHOUT the FPGA VI front panel, I can do the same as above, except the writing of the numerical values by the other VI are ignored by the FPGA.

Is there any way I can write numerical values to the FPGA from another VI without loading its front panel? 

Thanks in anticipation,

Dave

Message Edited by VK3DRB on 05-26-2009 04:06 AM

[Anna_K.]

Hello Dave,

What do you mean by running the FPGA 'without' the front panel? can you give me steps of what you are doing?

[VK3DRB]

Hi Anna.

I am using a PXI-7833R in a PXI chassis, where I developed an FPGA application, which has the normal hardware FPGA I/O connections configured in the project file for applying digital and analogue stimuli and reading outputs via the connectors. The FPGA has the bit file running on it. So when the PXI chassis containing the FPGA is powered on I can simply call up any higher level VI that works with the FPGA directly. Thus there is no need to run the FPGA VI from the project file, and of course there is no Labview FPGA VI front panel displayed.

But if I load the FPGA VI from the project file and run it, I can see some outputs change "live" via the FPGA VI front panel because I have connected those to traditional Labview indicators inside the FPGA code. One FPGA function is a PWM generator, where I set the high dwell time and the low dwell time via traditional Labview controls from a higher level VI. Its appears these traditional controls only work when the FPGA VI is running, and do not work when the FPGA VI is not running even though the FPGA bit file is loaded and running in the PXI chassis.

So in summary...

(Case 1) FPGA VI running with FPGA VI displaying traditional connectors and indicators on the front panel

   Hardware I/O works correctly,

   FPGA nodes called from higher level VI's work correctly,

   Traditional Labview controls from higher level VI's works correctly.

(Case 2) FPGA VI not running, but FPGA running

   Hardware I/O works correctly,

   FPGA nodes called from higher level VI's work correctly,

   Traditional Labview controls from higher level VI's do not work,

   No errors or broken VI's are seen,

   It appears the FPGA is diconnected from higer level Labview VIs, except for the FPGA nodes. 

I guess the crux of my problem is I want to vary the PWM dwell by passing numbers to the FPGA from another Labview VI, rather than passing a signal via a hardware I/O port; all without the FPGA project having to be loaded and run. I am not sure whether this can be done.

Sorry about the long winded explanation, but I hope this clarifies my problem. I can send you screen shots if you like.

[mrak1]

From my workings with FPGA, that is the expected behavior.  The actual VI never actually runs on the FPGA; however, registers on the FPGA chipset are mapped to the LabVIEW FPGA VI in memory when you run the  VI directly on the hardware. 

Are you getting some unexpected behavior other than the Controls and Indicators not updating when you load it from the bitfile?  Do you settings get applied to the I/O as expected even though you do not see the updates on the VI?

Good luck,

Mike

[Anna_K.]

Hello,

Have you tried creating a Real Time executable out of you VI's? You will then be able to run this on startup and not worry about starting the individual VI's.

You can do this in your Project Explorer by right-clicking Build Specifications and select New >> Real Time Application.

[VK3DRB]

Thanks Anna and Mike.

Mike, for your questions, (1) No and (2) Yes, although I would prefer not even to see the FPGA panel on the screen.

Anna, your answer is exactly what I need. However, when I right click the  under the FPGA section of the project, the option of Real Time Application is not available. The only options are Build Specifications -> New ->Source Distribution; and Build Specifications -> Help. If it is not an option, maybe the install was incorrect (a collegaue had done the install about a year ago.) The version of Labview is 8.5 and the FGPA Module is 8.5.0.

- Dave

[Anna_K.]

Hello,

Do you have LabVIEW Real Time installed? I will look into how to keep the FPGA Front Panel closed throughout execution.

Regards,

Anna K.

[mrak1]

Hi,

I was just re-reading your post and was thinking about what you are seeing.... Are you using the LabVIEW FPGA interface VI's and passing the FPGA reference to all callers in your Host Application?

If you are not, then reply and I will show you where to look.

Good luck,

Mike