When setting up memory in LV FPGA these seems to be one important setting missing....description.
Good programming practice defines that we should have descriptions in our code, similar to the VI description of a global variable. This would also help out immensely when using bit packed memory blocks to define status bytes and such as the description of the individual bit meanings could be added to the description and not having to be dropped as block diagram comments everywhere one of the nodes is used.
Greg Sussman
Sr Business Manager A/D/G BU
