ADC on myRIO

[Sam_Sharp]

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@Hooovahh wrote:

Having never used the myRIO personally I can't say for sure, but I didn't think you had to write FPGA code to talk SPI.  There is an express VI that you can configure to do SPI communication, and the FPGA code associated with this should already be written.

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That's exactly right - the myRIO palette in LabVIEW with the default myRIO personality has support for SPI and I2C - as long as your device uses fairly standard SPI/I2C protocols, you don't need to write any FPGA code.

[Slev1n]

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@Sam_Sharp wrote:

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@Hooovahh wrote:

Having never used the myRIO personally I can't say for sure, but I didn't think you had to write FPGA code to talk SPI.  There is an express VI that you can configure to do SPI communication, and the FPGA code associated with this should already be written.

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That's exactly right - the myRIO palette in LabVIEW with the default myRIO personality has support for SPI and I2C - as long as your device uses fairly standard SPI/I2C protocols, you don't need to write any FPGA code.

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This is all correct, mine was not using the standard, what the "compatible" indicated. The problem is, he is using the analog input already. Therefor he needs the FPGA as the internal ADC is going right into the FPGA. Using the "myRIO VIs" for SPI/I2C cause another bitfile being loaded onto the FPGA in the background. But running two parallel is not possible.

He can still use the VIs BUT he has to stop the other bitfile before. That is what support told me when I called them once.

Hope this helps.

Slev1n

[deepen_solanki]

Thank You 🙂 I will get started and let you know if im in a huddle

[deepen_solanki]

Thank You 🙂 I will get started and let you know if im stuck

[deepen_solanki]

I dont think I will be using express VIs .. I will try to write the code and post it so it can be checked.

Thanks ! 🙂 

[Sam_Sharp]

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@Slev1n wrote:

This is all correct, mine was not using the standard, what the "compatible" indicated. The problem is, he is using the analog input already. Therefor he needs the FPGA as the internal ADC is going right into the FPGA. Using the "myRIO VIs" for SPI/I2C cause another bitfile being loaded onto the FPGA in the background. But running two parallel is not possible.

He can still use the VIs BUT he has to stop the other bitfile before. That is what support told me when I called them once.

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No, sorry - but you were misinformed. The default FPGA personality for the myRIO gives you access to almost all of the I/O functionality of the myRIO - you can certainly use digital/analogue I/O at the same time as SPI etc. There's a guide here that details the different pre-compiled personalities available.

The only reason you'd need to modify the default personality and compile your own bitfile is if you need to do some custom logic / control on the myRIO.

[Slev1n]

Hey Sam,

I am not sure if I understand you correctly. But if I have some custom code on the FPGA, what I do have with my lock in amplifier, than I am not able to use the VIs from the myRIO palette?

kind regards

Slev1n

[Sam_Sharp]

You can modify one of the default personalities to add in your lock-in amplifier code on the FPGA - as long as you leave the other items in the FPGA personality alone, then you can still use the myRIO VIs from the palettes.

i.e. rather than use your own FPGA VI, create a modified version of one of the default FPGA VIs, add in your new functionality and compile.

[Slev1n]

Thanks for your advice,

I will keep it in mind for the next time. Now I made my own I2C and a few analog in and PWM out parts on the FPGA 🙂 Well I think for my application making custom code was maybe good to learn something and ressource saving (but less functionality compared to the myRIO VIs).