Automated FPGA builds - "Waiting" state versus "Complete" state

[Chris_12345]

I have written a VI (LV2012) that does automatic building of FPGA code, using ~\vi.lib\rvi\CDR\niFpgaBuild_GenerateCode.vi followed by niFpgaBuild_Compile.vi. Both have "wait until done" = T. This works fine, but with one strange behavior: the output state of niFpgaBuild_Compile.vi is "Waiting" instead of "Complete", even when the build has successfully completed. Any ideas on why that might occur?

Also, any suggestions on how to automatically close the build window once finished? I have tried niFpga_Compile_Shutdown.vi but that doesn't do it.

Thanks,

Chris

[T-REX$]

Without looking at your code, I will quickly say... Don't use those VIs.

Use these instead, much simpler: ...\vi.lib\rvi\ClientSDK\Core\Compilation