Baseline drift / low-frequency wander on NI-9230 modules (cRIO-9047 FPGA vs NI-9145)

[emacleo1]

Hi all,

I am experiencing some weird steplike baseline shifts in my IEPE acceleration measurements using my CRIO-9047 with NI9320 cards after swtiching the system from using DAQmx to FPGA. 

System Setup
Two systems in together, a crio and ethercat expansion:
cRIO-9047 with FPGA VI (DMA FIFO to RT app → TDMS logging).
NI-9145 EtherCAT chassis with FPGA VI (UDVs to RT app → TDMS logging).
Both use NI-9230 modules with piezoelectric accelerometers (IEPE).
Scaling is applied in the RT app for both systems.
Data types on both FPGA paths: FXP 24,7.

Problem
On the cRIO-9047 system, channels show large, random low-frequency baseline drifts and transient steps (see attached plots).
On the NI-9145 system, the data are mostly stable but show softer baseline wandering.
With the same sensors/modules in the cRIO-9047, when previously sampled for ~5 years using DAQmx, there was no drift.

Observations
The drift looks like a vbias wander, not real structural motion (piezo sensors are AC-coupled).
Only appears when using FPGA I/O nodes; not seen in DAQmx mode.
The FPGA code is simple: read module channels → write to FIFO → RT logging. No filtering or scaling on FPGA.
Wondering if there is a manual configuration setting for DC/AC coupling or bias removal on the NI-9230 when accessed via FPGA I/O that is missing compared to DAQmx.

Question for NI
1) Is there a required configuration step (DC coupling, bias adjust, HPF setting, etc.) for NI-9230 modules when used in FPGA mode?
2) Why would the same hardware/sensors be stable under DAQmx, but exhibit baseline drift when accessed through FPGA I/O?
3) Are there best practices for preventing these very low-frequency drifts (e.g., explicit high-pass, configuration register, or FPGA property node settings)?

I've attached the whole project below. The code is relatively simple and maybe a little backwards (I am a structural engineer!), but I don't see where anything would be causing this.... In the attached image, the wandering sensors are ch1-ch14, which are on the crio, and the ch15 to ch21 are on the EtherCAT chassis.

Thanks!

Ethan

[Hugo_Hauet]

Hello emacleo1,

To answer your questions:

• When you use any type of modules in FPGA mode, no further signal configuration step should be taken compared to the DAQmx mode.
• The same hardware/sensors should behave the same way in the RT DAQmx and FPGA mode. It means that your LabVIEW code might be the issue, it is possible that some DATA is lost in the code.
• Those issues should not appear, so no further practices are needed besides the usual: Calibration of the modules/chassis; Get started using the LabVIEW examples; Current used mode (RT DAQmx, LabVIEW FPGA, RT scan)

For further information you can follow the next link regarding the cRIO: Getting Started with a CompactRIO System in LabVIEW. I recommend to begin with the next link to obtain help for the LabVIEW example code and a guide/template to use properly a cRIO: LabVIEW Sample Projects & Templates.

Have a good day,

Hugo