CRIO fails to run at power-up, but OK if reset

[JF-NRAO]

Hi all.  We have an application that we have built and deployed for standalone operation on a CRIO 9022.

It works fine if we reset the CPU with the reset switch.  It comes up and runs properly.

If we power off the CPU and then power it on, it does not run (at least the FPGA does not drive the I/O)
  If we then reset the CPU with the reset switch, without doing anything else, it comes up and runs fine.  Any idea how to fix this?

The NO APP switch is correctly set.

Thanks!

John

[JF-NRAO]

A bit more information.

We've tried changing from using the mode where the bit file is part of the rt executable, to the mode where we flash the bitfile to the crio, with no luck.  In another post long ago someone mentioned that they increased the time delay during bootup to allow some third-party hardware to become ready before initializing everything.

How do you do that?  Is there something we can tweak in the init files somewhere?

Thanks. 

John

[WesWNI]

Hello JF-NRAO,

I would first like to ask if you have been able to confirm that the Real-Time VI is running upon cycling the power, isolating this issue to the FPGA code. If you are unsure how to do this, you may either use the Real-Time System Manager or look at the User LED on the front of the controller to verify that the VI is running. If this appears to be a behavior of the FPGA code (meaning that the RT VI is running upon reboot), you may consider using interrupts or putting in a wait function within a flat sequence structure in between the Open FPGA Reference and Read/Write functions. This may allow sufficient time for the FPGA to be initialized. 

http://zone.ni.com/reference/en-XX/help/371599H-01/lvfpgahost/fpga_method_wait_irq/  (Waits on IRQ)