Communication between cRIO 9068 and ethernet expansion chassis 9146

[ali.mootaab]

I am programming the FPGA both on 9068 and 9146.

Actually, in my configuration the cRIO 9068 is responsible to control a system and it needs to communicate directly with three 9146s. The purpose of these 9146s is to just add some inputs and outputs to the system. The main control is done by the cRIO.

On a higher level, I have my PC sending commands to the cRIO 9068. The cRIO does some calculations and need to write on some output pins on 9146s and also read from their inputs. In summay the system is like this PC<----->9068<----->9146.

Let me emphasis that the 9068 needs to write on output pins of 9146 and read from its inputs. Here is my question. How can I write to outputs of 9146s and read from their inputs?

As you said, the 9068 have access to variables hosted on 9146. As I underestand this means, I can read the inputs on the 9146 via Shared Variables. Is that correct? But how can I write to any output pins on the 9146s?

Also, I do not underestand the "Shared Variable API access VIs on the 9068's RT VI".

Sorry, I am new in cRIO and my questions might be silly.

Thanks,

Ali

[a_clucker]

Hi Ali,

I just ran the code from the bottom of the White Paper I linked in my first post on a cRIO 9074 (didn't have access to a 9068) and was able to read PSP tags from a 9146. The 9074 and 9146 were not direct connected, and were on the same subnet. The address I used for my variable was "ni.var.psp://10.2.136.21/Mod1/TC0".

You can find the VI needed by searching for "Read Variable" in the Function Palette.

[ali.mootaab]

Hi All,

The issue was resolved by changing the prgramming mode of the cRIO 9068 and Expansion Chassis 9146, from FPGA to Scan Interface. Most of the blocks in Scan Interface are not available in FPGA.

Finally, I established the communication between the PC and the cRIO using TCP. Note that, the PC and cRIO are connected to the same network. The Expansion Chassis does notd need to be connected to the second Ethernet Port of cRIO. They are connected to the same network as PC and cRIO. If you add the Expansion Chassis to the project in Scan Interface mode then all the IOs can easily be used in cRIO VI.

Thanks to all of you. Your feedbakc helped me to come up with this solution.

Ali

[pabgarva]

Hi! I am running into similar "problems", but this time I do need to have the 9146 in FPGA mode (since it includes some powertrain modules which do not work in scan mode).

I planned to connect the 9146 to the secondary port of a cRIO9038 and then, open fpga reference from the RT VI of the cRIO9038. However, I have not been able to do that. 

I followed the steps of the tutotorial "Connect EthernetRIO to the secondary port of a..." https://knowledge.ni.com/KnowledgeArticleDetails?id=kA03q000000x4LaCAI&l=en-US

Can someone provide any information? So far, I can link the 9146 directly to my host (in the same way the cRIO does, using 2 network cards), but this would require a larger modification of our code. 

Thanks!

[JiwhanS]

Hi pabgarva,

To communicate between the FPGA VI running on the expansion and the real-time VI running on the cRIO controller you should be able to use the same communication techniques that you use to exchange data between the cRIO controller and the local cRIO FPGA. Can you provide more details on the issue?