Controlling NI-9145 C Series Modules from cRIO-9068 FPGA via Python (nifpga)

[yigitkartal]

Hello everyone,

I am developing an FPGA VI and deploying its bitfile using the nifpga library on a cRIO-9068.
My goal is to control the C Series I/O modules of the cRIO directly from Python scripts via this bitfile.

However, since the cRIO-9068 has only eight slots, I purchased an NI-9145 EtherCAT expansion chassis to increase the number of available slots.
I’ve realized that the nifpga library cannot directly access or program the FPGA of the NI-9145, since it is an EtherCAT slave.

To overcome this, I’m considering using PDOs or shared variables to exchange I/O data between the NI-9145 FPGA and the main cRIO-9068 FPGA.

Is this approach possible?
Or are there any alternative ways to control the NI-9145 and its modules using the cRIO’s nifpga session in Python?

Thank you in advance!

[ZYOng]

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@yigitkartal wrote:

I’ve realized that the nifpga library cannot directly access or program the FPGA of the NI-9145, since it is an EtherCAT slave.

To overcome this, I’m considering using PDOs or shared variables to exchange I/O data between the NI-9145 FPGA and the main cRIO-9068 FPGA.

Is this approach possible?

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It is not possible. Direct FPGA-to-FPGA communication (e.g., FIFO or DMA between cRIO and NI-9145) is not supported. EtherCAT communication must go through the RT layer using the Scan Engine.

NI-9145 is supported by NI-IndusComm for EtherCAT driver. The drive is not supported by Python. You can either:

• Find non-NI third party ethercat python library.
• Use NI-9149 instead which can be accessed via nifpga-python 

[yigitkartal]

I searched about NI-9149 but couldn't find any resource that it is supporting nifpga library. Can you please share if there are any resource for that one? Thank you.

[ZYOng]

The following links show that NI-9149 can be accessed by NI-RIO API.

Setup Guide for Ethernet RIO Expansion Chassis

Communication Between NI-9149 Expansion Chassis and cRIO Controller

nifpga-python is the python api for NI-RIO driver.

[yigitkartal]

Thank you for the support. My final question will be regarding usage of nifpga for the NI-9149. I posted a simple example to deploy the fpga bitfile into the cRIO. How it will be handled for the NI-9149?

[ZYOng]

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@yigitkartal wrote:

Thank you for the support. My final question will be regarding usage of nifpga for the NI-9149. I posted a simple example to deploy the fpga bitfile into the cRIO. How it will be handled for the NI-9149?

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Similar to cRIO. The only difference is the latency.

When NI-RIO API is running on the cRIO, cRIO can access the FPGA directly via NI IP digital communication at microsecond latency.. Whereas for NI-9149, the communication is done via TCP/IP with milliseconds of latency due to network communication.