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Create an output clock with 6435 and daq mx 7.4

Hi,


I want to create an output clock with a variable frequency. I try to use the VI of daq mx 7.4 called "sample clock". Can you help me to do it because with my 6534 i can only have digital output and many examples i've read was for analog and they were not talking about output clock.

Thank you

Regards*

Alexis
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Message 1 of 24
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Hi,

The best way to find examples for a specific device is to go in Labview Help/find devices and SEARCH for "653x". The search's result will list you all the examples available for your 6534.
I mean, for example, Cont_pattern_Output.vi ....

Hope it will help you,
Regards

David D.
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Message 2 of 24
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Hi,


Thank you for your help but i would like to understand the daq mx use for my problem.
I've tried many configuration but i don't understand. Must i create a counter and then send it on the specific line that i want or must i create my line and the send on it a counter. And how can i build a counter to send it on a line of my 6534.I'm lost and i've worked all the day on it.
Can you give more advices please.

Thanks

Alex
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Message 3 of 24
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Hi,

I just attached a VI that shows you the generation of a pattern via the 6534. Do not forget that this board does not belong to the counter boards family. You only has to configure the digital I/O.
Hope it will help you,

Regards
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Message 4 of 24
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Hi,


Your VI works fine and help me a lot. Last think i wanted to know is how can i send on a line this clock and not on a port.
Is it important or can i write above the clock signal in other lines of the port?

Thanks
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Message 5 of 24
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Hi,

I think you could manage that with the command line grouping set at "one channel for each line" which means that you create a separate virtual channel for each digital line.
Hope it will help you ... Otherwise, look at the examples of digital generation on one channel and reproduce it 😉

Good luck

DD
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Message 6 of 24
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Hi,

I have done it. I wanted to make 8 clock front with a variable frequency and i've done it, thank you.Now i want to send an 8 bit word at each increasing front of the clock but i don't know how to synchronize my 2 signals.

Actually i've not used a special source for the sample clock in the creation of my clock signal (see CLK.vi) so when i want to trig the send of my 8 bits word (see SDI.vi) I can't use any reference because there is no source or i don't know which one.

How can i synchroniz the two signals?

Thank you
Regards
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Message 7 of 24
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Bonjour,

Une dernière petite question , quelle différence y a t il entre front et pattern (pour le trigger)?

Merci
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Message 8 of 24
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Bonjour,

J'ai trouver la différence et dans mon cas comme je créer un pattern de 8 front à fréquence variable ( nommé CLK ), je voudrais synchroniser un autre signal, qui est pour l'instant l'envoie de 1 bit, avec un des fronts de ce pattern. Dois-je faire un timer sur l'envoie de mon bit avant de trigger sur digital pattern ou non?
Dans tout les cas je n'arrive pas à synchroniser les deux!

Merci d'avance

Alexis
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Message 9 of 24
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Bonjour,

N'ayant pas la carte pour faire les tests, je vous joins un VI d'exemple de synchronisation entre deux tâches via trigger numérique. La solution est peut-être de router le signal de trigger.
Je vous joins l'exemple.... Je m'empresse de trouver une carte pour faire le test.

Cordialement
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Message 10 of 24
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