Cycle/loop formation in simulation loop

[VirtualWorld]

Hello

I am having a problem where output of block 2 is input to block 1 and output of block 1 is input to block 2.

There is a feedback node which allows to specify initial condition but it runs simulation only once. As far as I know while loop and simulation needs to be kept seperate.

Shift register can be another method to upadte it every time. But then also my simulation loop will have while loop inside.

Please see attched snapshot n it will give better idea

T and q are input/output for eacjh other

Thanks in advance. 

[dbohls]

As long as at least one of the outputs is fed indirectly by the inputs, then you will not have an algebraic loop. Otherwise, use the memory block which behaves like a shift register but takes into account the state of the simulation. The memory block is on the Utilities palette for Simulation.

"There is a feedback node which allows to specify initial condition but it runs simulation only once"

Do not use the feedback node; stick with the memory block. I am not sure what you mean about the simulation running only once, but the feedback node will not behave as you expect.

Avoid trying to use while loops in your simulation. Do not try to introduce "states" (like shift registers) that are external to the simulation. Simulations do things like take minor steps along the way and sometimes even reject steps and start over, and your externally introduced state will be incorrect if this happens. For example, let's say you create a VI with a while loop that increments a value whenever the VI is executed. If the simulation decides to reject a step and take a smaller one, your increment will have already incremented and will not know to roll back its state.

Hope that helps.

Damon