06-02-2009 09:35 AM
To my compactRIO with FPGA I have a C-series Digital IO (9401) with a RED relay on four different inputs. The relays creating contact bounces within 200µs at closing. I would like to debounce the input signals, Which are digital, for period time measurements.
Since I am new to the system it is not obvious to me how to solve this in the FPGA. There are a few ideas on this forum for similar problems for use in the host computer. However, they are to slow and not possible implement in the FPGA.
I would appreciate some ideas on this task.
Solved! Go to Solution.
06-02-2009 09:56 AM
06-02-2009 10:06 AM
Typically digital debouncing involves a small state machine which requires that the input stay in the new state for n clock cycles. It resets if the input reverts before the timeout. This should be fairly easy to implement in an FPGA, although I have not worked with them. For your case n would be selected to result in a time larger than 200 us.
Lynn