Extract Data from DMA.vi Question

[bones349]

Hello,

I am using LV 8.5 + FPGA with a 7831R.  I have a DMA FIFO setup from Target to Host, channel 0, 1023 Depth Size, Write "Arbitrate if Multiple Requestors Only".

On the FPGA side, I have been interleaving clock data with measured data in an alternating fashion (i.e. all odd data points are CLK(I16) combined w/ Data A(I16),  all even data points are Data B(I16) combined w/ Data C(I16))

I have been using the "ExtractFromDMA.vi" function to convert from 1D array on the Host Side. (This was found in Examples-> Hardware Input Output -> R Series -> FPGA Fundamentals -> DMA -> DMA Buffered Acquisition - R series.lvproj

All works fine on my host if I use the unmodified ExtractFromDMA.vi (I renamed it Extract Data from DMA.vi, attached).  Im writing this data to the "Write to Spread Sheet File.vi".  However, when I modified ExtractFromDMA to decimate the array (Extract Data from DMA_split.vi), I get errors.  All of a sudden the 'Elements Remaining' on the 'FIFO Read' shoots up to something like 8,000, and the Timeout flag from the FPGA is being read as true on the Host.  The data being writen to the spreadsheet never stops, however I am noticing alot of 'gaps' and missing data points.  Any idea whats going on here?  Im not sure if this 'decimate' idea is the proper way to do this... or maybe my CPU is too slow?

For the Extract Data from DMA.vi, my 'Number of Channels' is two, and the 'Samples per Channel' is 1023.  I also tried 'Samples per Channel' at 511, and 512 thinking that the 'Decimate' function would halve the number of data points.

Any ideas?

Thanks alot

[Spectre_Dave]

I interleave my DMA data and I  ue Decimate Array, Split number, and Build Array to "extract" the interleaved data.

[bones349]

Hmmm... this doesnt seem to work either.  Does 'Decimate Array' have to have a finite number of elements?  Im streaming in a continuous stream of data, will this work?

[bones349]

I have my data streaming in from the FPGA FIFO Read funtion.  Its a 1-D array of 32bit Integers being continuosly read in blocks of 1023 elements.

I'd like the Odd elements to go to one file, Even elements to go to another.  The 'Decimate 1D Array' function seems to be what I need.  However, it causes my DMA Read to timeout.

Puzzled... I'll sleep on it, see what comes up.

Thanks!! 

[Spectre_Dave]

Could you post your host data streaming code?

[bones349]

Okay, its attached.  There is a main case structure, just look at the one called "Square Wave".  I've attached a picture of it incase it doesnt open.  Also attached the Extract from DMA functions I'm currently trying.  Also added the "Always Copy" memory function to it as I read some other posts suggesting it.

So what happens is if I use the 'Extract from DMA.vi' it all works fine.  I get a 2D transposed array with thousands of elements written to a text file.  When I use the  "Extract from DMA_Split B.vi', to try and write even elements to one file, and odd elements to another; the FIFO read returns a timeout, and my data is mismatched.  (Meaning that data that should be in one file i.e. CLK, shows up in the other file)

MY guess is that when I do the Decimate 1-D array, it does not play nice with the continuous data stream.  If I remove 'Decimate 1-D array' and only write one text file, this problem goes away.

[Spectre_Dave]

You could place the decimate 1D array outside of the continuous read loop.  Pass blocks of data to another loop to the decimate 1D array and save to file function. Queues are excellent fro passing data between loops.

Another thought would be to increase the DMA size on the Host to insure that data is not lost. Adding the Decimate 1D array will consume some time so this may the cause of the problem.

Message Edited by VADave on 10-07-2009 07:21 AM

[Spectre_Dave]

Here is what I think you are trying to do.

[bones349]

Thank you for this suggestion.  I managed to get things working without having to use the decimate array.  A while back I was trying to use Two DMA FIFO channels on my machine, and it was not working (so I tried to interleave data on one channel).  I went back to the two channel approach and it is working fine now (not sure what changed? I stripped some code from my FPGA....).

On a side note, can I increase the "Number of Elements" field on my Host DMA Read function?  i.e.  On the FPGA the size is defined as 1023.  Does this value have to match on the Host? Or can I make it larger to try and get rid of data loss?