07-12-2021 09:21 AM
Hi,
my purpose is to extract PPS signal from GPS module 9467 and transmit it to DIO lines of module 9215.
I have already downloaded the FPGA Timekeeper library, but I don't know how to use it for my purpose.
Thank you
Loop3r_III
07-12-2021 10:18 AM - edited 07-12-2021 10:21 AM
Hi
When GPS Module 'Wait for PPS' node is execute this is moment when PPS happen.
You need to generate DO after that.
You could add synchronization with your DIO in the next frame parallel to GetTime.
07-12-2021 11:09 AM
Hi, thank you for the answer. I modified the code adding a DIO component in parallel to GetTime.vi
I'm confused about the meaning of boolean Timeout: is it the PPS signal or does it indicate a malfunction in the system?
07-12-2021 12:02 PM - edited 07-12-2021 12:06 PM
Hi
When you will removed GPS module from cRIO during FPGA running then Timeout will happens.
After 'Wait for PPS' will be execute, then pull DO high (frame no. 4). Use constant True. Not the Timeout (that one should never happen).
But you should set DO low as well. Otherwise you will have got only one rising edge there. 😜
Do you want 50 % duty cycle? Then you need nested flat frame to low signal after 20M ticks. Or you could use frame no. 6 which will give you delay approx 15M ticks.
Plus you should check 'GPS Status' to be sure that it is Normal that you have got GPS sync.
https://zone.ni.com/reference/en-XX/help/373197L-01/946x/crio-9467/