FFT express VI: maximum possible clock speed

[Bob_D]

I'm using the FFT express VI in an FPGA VI running on a PXIe-7962R.  The maximum clock speed I can use without getting timing errors on compilation is 125 MHz.  Is this about right for this VI?  I see that the Xilinx LogiCORE FFT has much faster max. clock speeds listed - > 300 MHz for most configurations.  Would I be able to achieve a significant speed increase by switching to the Xilinx IP module, or are there other timing considerations specific to LabVIEW FPGA that would slow it down?

[MorganS]

Hi Bob,

125 MHz does sound about right for the FFT Express VI.  You may be able to increase that a bit by adjusting the Clock rate, Throughput, and Length parameters, but you definitely won't be able to get it up to 300 MHz as you mentioned.  Based on the Xilinx LogiCORE FFT documentation, it does look like that could be a faster solution. Have you tried compiling with that method?  What clock rates were you able to compile.  Also, what rate are you trying to reach?

Thanks,

Morgan Sweatt

Applications Engineer

National Instruments