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[FPGA] DSP48 problem

DP48_example.png

 

I need to do a multiply in a 120MHz SCTL and DSP48 seems to be the only method to hack it. I started by taking a DSP48 that was configured as part of a complex multiply function within some NI code with the following input and output configuration:

a <signed 30,9>

b <signed 18,1>

c <signed 48,10>

 

In the snippet above, all I changed in the DSP 48 config (from some known working code) is the ranges of the inputs and outputs as you see it configured above, but it's giving incorrect results. Anyone understand why it doesn't give the same answer as the simple multiply in the snippet above?

 

This is running on a 5644 VST- but you can see the result with the above snippet running the code to execute on the PC.

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Hi there,

 

How have you chosen the integer word lengths for the DSP48E? That is, the last number in each of the terminals. 

 

You can find more information on the design considerations associated with the DSP48E at the link below which may help you:

http://www.xilinx.com/support/documentation/user_guides/ug193.pdf

Maria McKavanagh

FSE West London & Surrey
National Instruments UK & Ireland
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Can you post images of the DSP configuration pages (mode, registers and so on).

 

There are so many ways to implement a DSP, just showing the node itself tells us almost nothing.

 

Why not try a high-throughput multiply function instead of going directly voer a DSP node which is harder to configure?

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