FPGA Digital output access of 30 different channel with a individual delay for each

[mini09]

I`ve an cRIO-9012 with NI9476 and NI9403. I need to control each single pin with an different time delay to turn ON/OFF. My suggestion of program is as image attached. But when we add for 30 different loop will that be compiled? Is it an good way to code an FPGA.

[KateB]

If you wish to know whether it can comile, just duplicate it to 30 loops, and compile it. But if I were you, I'll use single cycle time loop, and counter for each line in shift register. Then, when counter hits a time limit, toggle the line and reset counter.

[mini09]

Hi KateB,

             I couldn't`t simulate the counter hit the time interval. Can you portait one if you have time to spare on it.?