04-02-2008 09:29 PM
04-03-2008 01:07 PM
Hi tartan5,
I have been reading your post and I was hoping you could give us a little more information about your application. I'm assuming you are using the Discrete Delay.vi inside a single-cycle timed loop but can you tell us a bit more about what you are trying to accomplish? Maybe even posting a screenshot of what you have right now and a description of what you are trying to do would really help us out.
Thanks,
Carla
04-03-2008 02:05 PM
04-03-2008 09:53 PM
04-03-2008 10:02 PM
Just a note, to open the VI you will need 8.5, and the additional "Fixed-Point Math Library for LabVIEW FPGA"
Thanks again....
04-04-2008 04:21 PM
10-09-2013 02:50 AM
Is not better to subtract old sample from "accumulator" before you add new sample to accumulator? This could protect against overflow. Another think is that we design accumulator size big enough to not overflow.