FPGA: Parsing and Manipulating Binary Data

[LV2019_Newb]

Hello,

I am very new to FPGA programming. I am trying to write a program that compares bits of data that is coming in (data could potentially change); I need to be able to parse the binary data in bit sets of two so that each set will compare itself; if 10 then 0, or if 01 then 1. I wrote a VI and tested it on PC, but the data does not update on the fly when I try running it on FPGA. Could someone please help me convert this to FPGA so that the data values will automatically update when the data changes.

The example in the VI is 32-bit: 01 01 01 10 01 01 01 01 01 01 01 01 01 10 01 01

After comparing the sets it will change to 16-bit: 1110111111111011

I tried using logical shift and rotate to parse through each bit and then compare, but the data being received could range in size from 8 total bits to 192 bits. But I am not sure how to write this efficiently and receive the correct response that I am looking for.

Thank you

[Bob_Schor]

Oops.  I misread the Post, and answered "the wrong question".  Could you post "how you did this" with an "ordinary VI" to help us understand where the hang-up is in converting it to run on FPGA?

Bob Schor

[Bob_Schor]

Sigh.  I need another cup of tea to wake me up.

You did post how you did this on the PC.  But it makes no sense to me.  From your description in your original post about what you are trying to do, I thought it was to take a boolean array and create another boolean array with only the bits in the "odd" (or possibly "even") bit positions, i.e. throw every other bit away.

If that's the task, it's very simple -- the most difficult part is figuring out whether you need to keep the "odd" or "even" bits, but you test it with 010101 -- you should get 000 or 111, and if it is the one you want, you're done, otherwise start the "keep/reject" flip-flop with the opposite choice.

[Did that make sense to you?  Do you know how a For loop can, by its indexing tunnels, let you see the bits one at a time?  How a Shift Register with a boolean "T" or "F" can be made to "flip flop" inside the loop by passing through a "Not" function?  How the output "Indexing Tunnel" can have a "Conditional" flag turned on so it will only output if the Condition has "True" wired to it?  [Hint -- wire the flip-flop to the Conditional terminal]

Bob Schor

[GerdW · Accepted solution]

Hi Newb,

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@LV2019_Newb wrote:

I need to be able to parse the binary data in bit sets of two so that each set will compare itself; if 10 then 0, or if 01 then 1.

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As Bob already wrote: right now it is sufficient to pick the 2nd bit of each pair of bits.

What happens when the input is either "00" or "11"???

Simple solution fitting to your description:

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@LV2019_Newb wrote:

the data being received could range in size from 8 total bits to 192 bits.

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No, wrong.

In a FPGA you can only handle fixed-sized arrays, so you will ALWAYS need to handle arrays of 8 bits (or U8 values)!

[LV2019_Newb]

Thank you GerdW and Bob! This is what I was looking for. I come from a text-based programming background, so learning the little tricks, like decimate 1D array, will stick with me on my LabView learning journey.

Thanks again